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Featured Web Seminar
IC DesignPower Efficient Design Challenges and Trends
This webinar will cover key aspects to the forces from a technology and market perspective that are driving designers towards better energy efficient designs. View On-demand Web Seminar
Featured Techpub
Silicon Test and Yield AnalysisCombining Low Pin Count Test with Scan Compression Dramatically Reduces Test Interface and Cost
The manufacturing test process for ICs is increasing in cost and effort to keep up with rigorous quality standards, complexity of newer designs and process nodes, narrower time-to-market windows, and demand... View Techpub
Atmel Corporation
Atmel Corporation Calibre helped cut time-to-market by up to 10X and provided significant savings in wasted mask and silicon creation costs. Learn More
News
- news: ASIA Company Reduces Wire Harness Design Cycle Time Using Mentor Graphics CHS Tools (Feb 4, 2010)
- news: Mentor Graphics HyperLynx PI (Power Integrity) Wins the 2010 DesignVision Award for System Modeling and Simulation (Feb 3, 2010)
- news: Mentor Graphics Enhances Signal and Power Integrity Solution with Full-Wave 3D Analysis (Feb 2, 2010)
- news: Mentor Graphics Enhances Signal and Power Integrity Solution with Full-Wave 3D Analysis (Feb 2, 2010)