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Mentor Blogs

Posts tagged with '0-In'

7 Jun, 2010

Ping Yeung After spending years verifying ASICs with dynamic simulation, I started working on static verification 10 years ago in a startup called 0-In Design Automation. I firmly believe that static verification can complement dynamic simulation. Static verification uses synthesis and formal technologies to find bugs in the design. It does not rely on simulation stimulus. You do not need to exercise the bugs, … Read More

Assertion-Based Verification, CDC, 0-In, DAC, Formal

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Accelerating ARM-based Design

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