Mentor Blogs

Posts tagged with 'ASIC Emulation'

Emulation 104 -- Running More Tests in Less Time

Posted Mar 8, 2010, by Ralph Zak

In an earlier blog I talked about the value of emulation in terms of providing direct project cost and schedule reductions that generally dwarf the actual costs of emulation systems. I have been asked by some to provide a “prequel” discussion, with a higher level description of the SoC verification problem and how emulation systems address verification challenges. Rather than trying to cover the … Read More

Tags: SoC Verification, Emulation, FPGA Boards, ASIC Emulation, SoC Emulation, SoC Simulation, FPGA Systems, Simulation Acceleration

Emulation 103--Accelerating Transaction-based Verification

Posted Oct 7, 2009, by Ralph Zak

Transaction-Based Verification is a technique for verifying modern SoC designs with interfaces such as PCI express, using test benches at the transaction level of abstraction. Transaction-based verification complements directed and constrained random tests, and is an emerging methodology for verifying complex SoCs that have multiple on-chip standard bus and peripheral interfaces. Typically in a transaction-based … Read More

Tags: TBV, System on Chip, Transaction-Based Verification, Emulation, FPGA Prototyping, ASIC Emulation, SoC, SoC Verification, Simulation, Simulation Server Farms

Emulation 101 – SoC Emulation vs. Prototyping: What’s the Difference?

Posted Jul 20, 2009, by Ralph Zak

This is my first blog posting about SoC Emulation for verification of SoC designs.  To set the stage, along with my biases, I am currently employed by Mentor Graphics and responsible for business development in the Emulation Division. I am an un-apologetic, evangelist for hardware-based verification. My experiences with hardware assisted verification began with simulation accelerators in the 80’s … Read More

Tags: SoC Prototyping, SoC Emulation, ASIC Emulation, ASIC Verification, EDA, Prototyping, SoC, FPGA Boards, FPGA Prototyping