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IC Design
5 Mar, 2012

TSMC 28nm yield (SemiWiki)

Posted by Simon Favre

Simon Favre I posted the following reply to Daniel Nenni’s article on TSMC 28nm yield: “I agree that design teams need to take more ownership of the yield issue. Unfortunately, yield is such a sensitive topic that people only talk about it when it’s bad! The defect density vs. die size and yield curves above represent the simplest area-based yield model, based on an average across many designs, … Read More

CAA, TSMC, 28nm

IC Design
11 May, 2010

Critical Area Analysis and Memory Redundancy

Posted by Simon Favre

Simon Favre This week, I’m off to present a paper on Critical Area Analysis and Memory Redundancy. It’s at the 2010 IEEE North Atlantic Test Workshop in Hopewell Junction, NY, just up the road from Fishkill. IBM is in Fishkill. IBM invented CAA in what, the 1960’s? Venturing into IBM country to speak on Critical Area Analysis is kind of like being the court jester. I just hope they don’t say, “Off with his head.” … Read More

Redundancy, CAA, SoC, SRAM

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