Posted Nov 22, 2010, by Paul Johnston
Let’s look briefly at cause and effect. In previous notes on this subject, I remarked choices between in-sourced or outsourced information technology solutions in an electrical design processes yield consequences . What’s in it for you? Knowing more about these issues will inform your choices.
A common way of referring to a tangle of human-factor issues is to say decisions are “political.”
Radical … Read More
Tags:
Electrical Interconnect Design,
Electrical Distribution Systems,
Extensibility,
Automotive Electrical and Electronic Systems Design,
Capital Harness Systems,
API,
IESD,
Deployment,
Design Rules,
Wiring Harness,
CHS,
COTS
Posted Aug 20, 2009, by David Abercrombie
I got some questions from my last installment of this series asking for some pictures of defects that caused yield issues in production that could have been avoided during design. It struck me that most designers probably never get a chance to see the manufacturing problems their designs encounter. Since my background is in the fab, I wrongly assumed everyone had lived through the same pain as myself. … Read More
Tags:
Reliability,
IC Verification,
Yield,
Design Quality,
Design for Manufacturing,
Scoring,
Design Rules,
IC Design,
Physical Verification,
Design Rule Checking
Posted Aug 4, 2009, by David Abercrombie
I felt privileged this year to get a paper accepted into the technical track at DAC. It seems more and more difficult to get something through. I think they said they only had a 20% acceptance rate this year. I was glad to get to present this one because it was fun doing the experimentation for it and I think it helps answer one of the nagging questions I always get about eqDRC. I worked with Fedor … Read More
Tags:
IC Verification,
IC Design,
DAC,
Design Quality,
Design for Manufacturing,
Design Rules,
DRC,
Physical Verification,
Design Rule Checking
Posted Jul 31, 2009, by David Abercrombie
Well, day two of DAC started a little earlier than the first day. I had to attend the speakers breakfast for the paper I was going to give later that day. However, after breakfast I had my 9am suite presentation on eqDRC again and I also had a special guest again. This time it was Robert Boone from Freescale in Austin, TX. He works in the DFM team and he also agreed to come tell everyone what he and … Read More
Tags:
Reliability,
IC Verification,
Yield,
Physical Verification,
Design for Manufacturing,
DAC,
DRC,
IC Design,
Improvability,
Design Rule Checking,
Design Rules
Posted Jul 28, 2009, by David Abercrombie
Well it felt familiar to be back in San Francisco for DAC this year. However, I wasn’t ready for the cold. It was 100 degrees in Portland when I left and I always assume the Bay area will be warmer. Luckily I looked at the weather map before I finished packing and replaced my short sleeve shirts with long sleeve ones. I didn’t get in until late Sunday night so I only had time for a dinner in the Westin … Read More
Tags:
IC Verification,
IC Design,
Yield,
Design Quality,
Design for Manufacturing,
DAC,
Design Rules,
Leakage,
DRC,
Physical Verification,
Power,
Design Rule Checking
Posted Jul 2, 2009, by David Abercrombie
That is the question!
If you read my colleague John’s most recent posting “Waive of the future?”, you will understand the question. I was equally shocked as John to find that almost no one tapes out DRC clean anymore. I would add one other reason to John’s list as to why this has happened. I think the traditional DRC rules are broken. Please read my first post “Are Design Rules Broken?” for my stance … Read More
Tags:
IC Verification,
IC Design,
Design Quality,
Design for Manufacturing,
Design Rules,
DRC,
Physical Verification,
Design Rule Checking
Posted May 15, 2009, by David Abercrombie
It is no mystery that the number of design rules has exploded over the past few technology nodes. It’s impossible for any human designer to “remember” them all, much less follow them all. It’s also a problem for the CAD engineer. We extracted some data from a spectrum of DRC decks that our customers have in production and the graph below shows the results.
DRC Rule Count and Complexity by Technology … Read More
Tags:
Design Rule Checking,
Design Rules,
Physical Verification,
DRC
Posted May 12, 2009, by Paul Johnston
How soon out of date our foolish notions. How persistent our tastes and allegiances.
One of the suggested topics in the first post is now no longer relevant, fading swiftly as topical. Pick one of the other ones. Not number 6 - time and events have already overtaken it.
How true the Robert Burns proverbial line about nest building rodent mother - there’s a Mothers’ day reference in honour or honor … Read More
Tags:
CHS,
Bury FC,
Design Rules,
Design Constraints,
Capital H,
Capital Library
Jim Martens
John Day
J VanDomelen
Nazita Saye
Michael Ford
Robin Bornoff
Dennis Brophy
Mike Jensen
Colin Walls
Tom Fitzpatrick
Max Clark
Patrick Carrier
Mark Laing
Travis Mikjaniec
Christopher Hallinan
Bernard Sutton