Mentor Blogs

Well it felt familiar to be back in San Francisco for DAC this year. However, I wasn’t ready for the cold. It was 100 degrees in Portland when I left and I always assume the Bay area will be warmer. Luckily I looked at the weather map before I finished packing and replaced my short sleeve shirts with long sleeve ones. I didn’t get in until late Sunday night so I only had time for a dinner in the Westin … Read More

IC Verification, IC Design, Yield, Design Quality, Design for Manufacturing, DAC, Design Rules, Leakage, DRC, Physical Verification, Design Rule Checking

In my last post I discussed the reasons and challenges associated with “waivers” for DRC.  As discused, this is becoming a bigger and bigger challenge as designs become more intricate and design rules become more complex.  To the poor design team that has the challenge of integrating IP from multiple sources into a single working design, this can become a nightmare to manage.  Not only is the DRC debug … Read More

Physical Verification, DRC, Calibre, DAC, Waivers

That is the question! If you read my colleague John’s most recent posting “Waive of the future?”, you will understand the question. I was equally shocked as John to find that almost no one tapes out DRC clean anymore. I would add one other reason to John’s list as to why this has happened. I think the traditional DRC rules are broken. Please read my first post “Are Design Rules Broken?” for my stance … Read More

IC Verification, IC Design, Design Quality, Design for Manufacturing, Design Rules, DRC, Physical Verification, Design Rule Checking

Many, many years ago, when I started in this business, I encountered something that I thought was surprising.  In my very first DRC benchmark, I was struggling with a particular rule.  The customer had given me a 0.25 micron layout, which they had successfully taped out.  My job was to write a rule file in the new tool to measure performance improvement.  My code matched the design rule manual and passed … Read More

IC Design, DRC

DAC is less than two months away… and the phone is starting to ring again…saying “We are doing demos and realize that we are showing Calibre everywhere. Do you want to participate in our demos?” Of course we do Our approach has always been to make Calibre available in every design tool and on every database. This approach is good for everyone.  Designs have to be certified “clean” (more on that in … Read More

DRC, IC, Calibre

In my previous post about TSMC making some DFM analysis steps mandatory at 45nm, I ended with a question about why the foundries can't just write better design rules (and rule decks) to make sure all designs yield well. This is a topic that has been discussed elsewhere, but here's my take on it. If we take a step back for a moment, there is something generic about DFM analysis that needs to be considered. … Read More

DRC, 45nm

I admit it.  I’m one of those rare adults who is actually willing to admit that he (or she) is a true fan of professional wrestling; have been since I was a kid in the early 70’s.  Over the entire course of those years, probably the greatest athlete in professional wrestling has been the recently retired  “Nature Boy” Ric Flair.  A multi-time world champ, one of Ric’s most prominent quotes has been … Read More

DRC, LVS, Physical Verification, Ric Flair

It is no mystery that the number of design rules has exploded over the past few technology nodes. It’s impossible for any human designer to “remember” them all, much less follow them all. It’s also a problem for the CAD engineer. We extracted some data from a spectrum of DRC decks that our customers have in production and the graph below shows the results. DRC Rule Count and Complexity by Technology … Read More

Design Rule Checking, Design Rules, Physical Verification, DRC