Mentor Blogs

Pre-Silicon Software Development with Sourcery CodeBench Virtual Edition I recently got a crash course in hardware/software design workflows. While my software background is strong, my hardware design knowledge is very light. Any thoughts I have on Karnaugh maps or rising edge flip-flops are quite dusty. Even so, I clearly understood the problems solved by the new Sourcery CodeBench Virtual Edition, … Read More

virtual edition, Veloce, virtual prototype, pre-silicon, QEMU, Emulation, Vista, SystemC, RTL, Sourcery Analyzer

I recently posted about using Virtual Prototypes pre-silicon with the recently introduced Sourcery CodeBench Virtual Edition and mentioned that the same native software development approach can be used when RTL is available on emulators.  This enables embedded software and hardware designers to exercise a HW design using actual SW, and a full stack which includes firmware, drivers, the operating system … Read More

virtual prototype, emulator, pre-silicon, Emulation, Veloce, virtual edition, RTL

Mentor very recently introduced  a product that brings together the so far separate worlds of EDA or SoC design from embedded software with the new Sourcery CodeBench Virtual Edition. There is now a way pre-silicon to make use of native software development, for example running a complete Linux stack. This enables a number of things pre-silicon including: Validation of HW/SW SoC interfaces Integration … Read More

pre-silicon, Sourcery Analyzer, Emulation, virtual prototype, Vista, virtual edition

Our second day at Embedded World is no less busy than the first.  In addition to a number of demos at the Expo (Hall 5, Booth 324) we are presenting a number of sessions as well. We have three different presenters on this second day and the sessions really do cover a lot of different topics: Walter Sabia has a session “Virtual Prototyping – Development of multi-discipline Systems from … Read More

Emulation, USB, Embedded World, virtual prototype

A system-level verification engineer once told me that his company consumes over 50% of its emulation capacity debugging failures. According to him there was just no way around consuming emulators while debugging their SoC design emulation runs. In fact when failures occur during emulation, verification engineers often turn to live debugging with JTAG interfaces to the Design Under Test. This enables … Read More

Functional Verification, Instant Replay, Emulation, Verification, Verification Academy, JTAG, SoC

Verification Techniques & Technologies Adoption Trends This blog is a continuation of a series of blogs, which present the highlights from the 2010 Wilson Research Group Functional Verification Study (for a background on the study, click here). In my previous blog (Part 8 click here), I focused on some of the 2010 Wilson Research Group findings related to design and verification language trends. … Read More

Emulation, testbench, Functional Verification, Formal Verification