Posted Oct 7, 2009, by Ralph Zak
Transaction-Based Verification is a technique for verifying modern SoC designs with interfaces such as PCI express, using test benches at the transaction level of abstraction. Transaction-based verification complements directed and constrained random tests, and is an emerging methodology for verifying complex SoCs that have multiple on-chip standard bus and peripheral interfaces. Typically in a transaction-based … Read More
Tags:
TBV,
System on Chip,
Transaction-Based Verification,
Emulation,
FPGA Prototyping,
ASIC Emulation,
SoC,
SoC Verification,
Simulation Server Farms
Posted Aug 14, 2009, by Ralph Zak
In my last blog I stated I was an evangelist for using emulation to verify SoC designs. I defined Emulation Systems as verification systems which provide (1) Vector and transaction-based simulation acceleration and (2) in-circuit emulation (ICE) capability to perform system integration and test using real world data before silicon is available. Emulation systems are typically built on custom emulation … Read More
Tags:
Emulation,
Functional Verification,
FPGA Prototyping,
System Verilog,
VMM,
OVM,
SoC Verification
Posted Jul 20, 2009, by Ralph Zak
This is my first blog posting about SoC Emulation for verification of SoC designs. To set the stage, along with my biases, I am currently employed by Mentor Graphics and responsible for business development in the Emulation Division. I am an un-apologetic, evangelist for hardware-based verification.
My experiences with hardware assisted verification began with simulation accelerators in the 80’s … Read More
Tags:
SoC Prototyping,
SoC Emulation,
ASIC Emulation,
ASIC Verification,
EDA,
Prototyping,
SoC,
FPGA Boards,
FPGA Prototyping
Jim Martens
John Day
J VanDomelen
Nazita Saye
Michael Ford
Robin Bornoff
Mike Jensen
Colin Walls
Tom Fitzpatrick
Patrick Carrier
Mark Laing
Travis Mikjaniec
Christopher Hallinan
Bernard Sutton