Posted Dec 13, 2011, by Mark Olen
Instant Replay Offers Multiple Views at Any Speed
If you’ve watched any professional sporting event on television lately, you’ve seen the pressure put on referees and umpires. They have to make split-second decisions in real-time, having viewed ultra-high-speed action just a single time. But watching at home on television, we get the luxury of viewing multiple replays of events in question … Read More
Tags:
Verification,
testbench,
Cortex,
Functional Verification,
ARM,
SoC Level Verification,
Software as a Testbench,
Simulation,
SoC
Posted Jul 26, 2011, by Mark Olen
Who Doesn’t Like Faster?
In my last blog post I introduced new technology called Intelligent Testbench Automation (“iTBA”). It’s generating lots of interest in the industry because just like constrained random testing (“CRT”), it can generate tons of tests for functional verification. But it has unique efficiencies that allow you to achieve coverage 10X to 100X … Read More
Tags:
Functional Verification,
Intelligent Testbench Automation,
Constrained Random Test,
testbench,
Verification,
iTBA,
Simulation
Posted Jun 28, 2011, by Mark Olen
iTBA Introduction
If you’ve been to DAC or DVCon during the past couple of years, you’ve probably at least heard of something new called “Intelligent Testbench Automation”. Well, it’s actually not really all that new, as the underlying principles have been used in compiler testing and some types of software testing for the past three decades, but its application to electronic design verification is … Read More
Tags:
Functional Verification,
Intelligent Testbench Automation,
functional coverage,
Verification,
Verification Academy,
Simulation,
testbench
Posted Jun 26, 2011, by Harry Foster
Verification Techniques & Technologies Adoption Trends
This blog is a continuation of a series of blogs, which present the highlights from the 2010 Wilson Research Group Functional Verification Study (for a background on the study, click here).
In my previous blog (Part 8 click here), I focused on some of the 2010 Wilson Research Group findings related to design and verification language trends. … Read More
Tags:
Simulation,
Emulation,
testbench,
Functional Verification,
Formal Verification
Posted Jun 24, 2011, by Tom Fitzpatrick
Well, another DAC is behind us, and you know what that means. That’s right, the super-sized DAC issue of Verification Horizons is now available online. You can download the full issue or individual articles from the Verification Horizons tab at Verification Academy.
Over the next few days, I’ll be highlighting some of the articles to give you a taste of the great content available directly … Read More
Tags:
UVM,
Verification Academy,
Functional Verification,
Verification Horizons
Posted Apr 21, 2011, by Dennis Brophy
User Adoption of OVM Featured; Views on UVM Discussed
The Mentor Graphics user group meeting, User-2-User, in Santa Clara is all set. U2U will be held on 26 April 2011 at the Santa Clara Marriott and one of the tracks will feature functional verification after keynote presentations by Mentor’s CEO, Wally Rhines and Xilinx’s CTO, Ivo Bolsens.
Registration for the event is open and is fee-free. U2U … Read More
Tags:
Functional Verification,
OVM,
Accellera,
UVM,
VIP,
Standards,
U2U
Posted Apr 20, 2011, by Harry Foster
Testbench Characteristics and Simulation Strategies (Continued)
This blog is a continuation of a series of blogs, which present the highlights from the 2010 Wilson Research Group Functional Verification Study (for a background on the study, click here).
In my previous blog (Part 6 click here), I focused on some of the 2010 Wilson Research Group findings related to testbench characteristics and simulation … Read More
Tags:
Simulation,
testbench,
Functional Verification,
Verification
Posted Apr 18, 2011, by Harry Foster
Testbench Characteristics and Simulation Strategies
This blog is a continuation of a series of blogs that present the highlights from the 2010 Wilson Research Group Functional Verification Study (for background on the study, click here).
In my previous blog (click here), I focused on the controversial topic of effort spent in verification. In this blog, I focus on some of the 2010 Wilson Research … Read More
Tags:
Simulation,
testbench,
Functional Verification,
Verification,
Wilson Research Group Study
Posted Apr 4, 2011, by Harry Foster
Effort Spent On Verification (Continued)
This blog is a continuation of a series of blogs, which present the highlights from the 2010 Wilson Research Group Functional Verification Study (for a background on the study, click here).
In my previous blog (click here), I focused on the controversial topic of effort spent in verification. This blog continues this discussion.
I stated in my previous … Read More
Tags:
Functional Verification,
Verification,
Formal Verification
Posted Apr 3, 2011, by Harry Foster
Effort Spent On Verification
This blog is a continuation of a series of blogs, which present the highlights from the 2010 Wilson Research Group Functional Verification Study (click here). In my previous blog (click here), I focused on design and verification reuse trends. In this blog, I focus on the controversial topic of amount of effort spent in verification.
I have been on the technical program … Read More
Tags:
Functional Verification,
Verification,
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