Mentor Blogs

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• ebay said Hello, just wanted to mention, I liked this post. ... in DAC Panel: Bridging Pre-Silicon Verification and Post-Silicon Validation
• Roger said I do have to agree. Learning to be computer engien... in X-Ray Vision Glasses … Here and Now
• Mutlu said Hi John,Thanks for the comment.I think you and I a... in UVM Adoption: Go Native-UVM or use OVM Compatibility Kit?
• Dave Rich said Make sure you are using the 32-bit version of Ques... in Using the UVM 1.0 Release with Questa
• BK said How to resolve error in simulating UVM1.1 W7(64-bi... in Using the UVM 1.0 Release with Questa
• (Wasted) Effort Spent In Verification | AgileSoC said [...] in that series comes via my new favorite har... in Part 5: The 2010 Wilson Research Group Functional Verification Study
• (Wasted) Effort Spent In Verification | AgileSoC said [...] just spent a few minutes reading Harry Foste... in Prologue: The 2010 Wilson Research Group Functional Verification Study
• More Than Two Decades and Still Going Strong; FloTHERM and FloVENT V9.3 Now Released « Robin Bornoff's blog said [...] XML strategy, whereby geometry data can be a... in FloTHERM and its new XML neutral file format
• omer said Hello Dave, Thank you very much for progressive e... in SystemVerilog Coding Guidelines: Package import versus `include
• Michael Ford said The currently most popular aspect of design for re... in Extreme Design!

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Blogs by Design Area

• Electromagnetic (EM) Design & Simulation Software
• Embedded Software
• Electronic System Level Design
• Valor MSS PCB Manufacturing Systems Solutions
• Electrical & Wire Harness Design
• Functional Verification
• IC Manufacturing
• IC Design
• Mechanical Analysis
• PCB Design Software & Tools
• System Modeling
• Vehicle System Design

Mentor Blog Authors

• Jim Martens
• John Day
• J VanDomelen
• Nazita Saye
• Michael Ford
• Robin Bornoff
• Mike Jensen
• Colin Walls
• Tom Fitzpatrick
• Patrick Carrier
• Mark Laing
• Travis Mikjaniec
• Christopher Hallinan
• Bernard Sutton