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Mentor Blogs

Posts tagged with 'LVS'

27 Jan, 2010
IC Design

The Value of Support

Posted by John Ferguson

John Ferguson When asked about the value that the Calibre platform brings to the design community, most folks will respond with performance, foundry support, and ease of debugging. While these are all valuable aspects and traits of Calibre, there is one more benefit that is often taken for granted: support. The word “support” is something bandied around loosely in EDA. Saying you have good support is akin to saying … Read More

DRC, EDA Ssoftware Support, Calibre, LVS, Physical Verification

15 Dec, 2009

John Ferguson I don’t normally take the time to respond to any of the various competitive claims out there. But recently in ESNUG 483, item #2, there was a posting entitled “We recently dumped Mentor Calibre for Magma Quartz DRC/LVS” (http://www.deepchip.com/items/0483-02.html) that I feel needs to be addressed because it is misleading. So let me lay out the facts to set the record straight. Tezzaron Semiconductor … Read More

Deepchip, DRC, Calibre, Quartz, Tezzaron, LVS, Physical Verification

27 Jun, 2009
IC Design

How do you debug LVS?

Posted by Matthew Hogan

Matthew Hogan There are many way to skin a cat, so the saying goes… (well, at least in English… I’m sure each nationality / language has something similar). So when your debugging and verifying your IC design with LVS, what information do you use? Are you a text report kind of engineer, pouring over the text files that Calibre LVS generates? Are you an RVE wiz, preferring to do things in a GUI? Or do you use a bit … Read More

Debugging, RVE, LVS

1 Jun, 2009

John Ferguson I admit it.  I’m one of those rare adults who is actually willing to admit that he (or she) is a true fan of professional wrestling; have been since I was a kid in the early 70’s.  Over the entire course of those years, probably the greatest athlete in professional wrestling has been the recently retired  “Nature Boy” Ric Flair.  A multi-time world champ, one of Ric’s most prominent quotes has been … Read More

DRC, LVS, Physical Verification, Ric Flair

28 May, 2009
IC Design

Source Netlist Creation for LVS

Posted by Matthew Hogan

Matthew Hogan Hopefully you’ll find the current and future content posted here interesting enough that you’ll come back and share own opinions, thoughts and ideas. Please let me know if there are specific topics you’re interested in. Maybe we can look at these in the future… Today, I’d like to explore the task of creating a trusted source netlist that is used as the template for comparison to prove that your layout … Read More

Verilog, SPICE, Calibre_LVS, Hierarchical LVS, Calibre, Netlist, nmLVS, Hierarchical_LVS, LVS

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