Sign In
Forgot Password?
Sign In | | Create Account

Mentor Blogs

Posts tagged with 'OVM'

15 Jan, 2010

Dennis Brophy Users Can Start Migration to OVM Today Accellera’s Verification Intellectual Property (VIP) Technical Committee (TC) co-chair issued a public status report that highlights the group’s progress on its first phase of work, the OVM/VMM Interoperability Guide and companion software interoperability kit, and its second phase of work, a common base class library (CBCL) with OVM as its basis. As the market … Read More

OVM, Accellera, VIP-TC, VMM

6 Jan, 2010

Harry Foster PROLOGUE: Over the weekend, I was thinking about a recent visit I had with an advanced ASIC team manager who told me that they had optimized most aspects of their verification flow to such an extent that most of their remaining effort was spent in debugging. So, I decided to work up a draft blog on debugging. However, this morning, when I was preparing to post my blog, I noticed that Richard Goering … Read More

OVM, Debugging

18 Dec, 2009

Tom Fitzpatrick I see that Synopsys has finally released VMM1.2. Congratulations, guys. There will be plenty of opportunity over the coming weeks to discuss the relative merits of OVM vs. the OVM features that have been “borrowed” and jammed into this new version of VMM, (factory, phasing, hierarchy…) but I’d like to talk a bit in this post about Synopsys’ unique approach to version numbering. Let me just say that … Read More

OVM

9 Dec, 2009

Tom Fitzpatrick Hi Gang, As you may know, in addition to my duties here at Mentor, I’m also the General Chair of DVCon 2010. So it is with two hats on that I encourage you to check out the DVCon website. With my “General Chair hat” on, I’d like to point out that we’ve actually expanded the conference to add an extra set of half-day tutorials on Monday afternoon, Feb. 22. That’s right! While other conferences are … Read More

OVM, DVCon

2 Dec, 2009

Dennis Brophy SystemVerilog proved to be a “royal flush” of a reason 100’s of people to gather together. Leaving poker references behind, two SystemVerilog User Group meetings were held in India in November. The Cliff Cumming’s “fan club” came out in force at both the Noida and Bangalore locations. When nearly 100% of those who registered showed up at the Noida event, I was almost certain we would have the same … Read More

OVM

PADS Home Page

PCB Design

Valor PCB Manufacturing Systems Solutions

Electrical & Wire Harness Design

IC Manufacturing

IC Design

Mechanical Analysis

Silicon Test and Yield Analysis

System Modeling

Vehicle System Design

3D-IC Design and Test Solutions

Aerospace and Military Solutions

Accelerating ARM-based Design

Automotive Solutions

Fabless/Foundry Ecosystem Solutions

Recent Comments