In my last blog I discussed the importance of support and the value it provides in the physical verification space. As indicated, one of the key components in providing support is having an infrastructure helps to assure quality software releases in the first place. In this blog, I will provide more insight into the procedures in place within the Calibre organization that help to ensure the high standards … Read More
Mentor Blogs
Posts tagged with 'PV'
Design rule checking (DRC) or physical verification used to be easy. For example, run some 1-D width and spacing checks to ensure things will resolve and won’t short and you are good to go. These checks were simple to write, fast to run and understandable, and quick to debug. Today is a new world order, where none of these attributes are true anymore. An increasing number of checks are 2-D, very … Read More
IDM, IC Design, Pattern Matching, SoC, eqDRC, Calibre, Fabless, Physical Verification, Productivity, Foundries, Equation-Based DRC, PV, Sign-off, Fab-lite
Since DAC we have heard a lot about physical verification tools claiming they can read the Calibre(R) SVRF/TVF syntax natively. This blog explores why competitive EDA companies are trying to use Calibre SVRF/TVF, the challenges involved, and the risks to customers.
Why Do Competing PV Products Want to Use Calibre SVRF?
Calibre is a primary sign-off standard at all the major foundries and IDMs, and … Read More
Foundries, Fabless, Foundry, TVF, Translators, Direct Read, PV, DRC, Sign-off, SVRF, Calibre, Syntax, IC Design, Equation-Based DRC, IDM, Fab-lite, Native Read, Physical Verification, eqDRC
A new season of NBC’s “The Biggest Loser” recently started. Have you seen this show? My wife, Cherie, loves it; she finds it inspirational to watch these folks put them through such a tough ordeal in order to improve their health. I enjoy it as well, though my motives are completely different. There are some pretty large individuals on that show. Somehow watching them makes me feel less self-conscious … Read More
DRC, Performance, Calibre, Runtime, Scaling, Physical Verification, PV
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Texas-Sized DAC Edition of Verification Horizons Now Up on Verification Academy
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Why Not Just Shove a Heatsink on Top of it? Part 2: Heat Flow Budgets
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SystemVision 5.10
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Engineering Muscle Memory
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Lofty Goals Part One
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To Infinity and Beyond
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Instant Replay for Debugging SoC Level Simulations
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GENIVI development strategy requires competitors to cooperate
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ARM Development Conference
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A truck transformed
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The massive growth of automotive electronics
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A deep dive into automotive interface design
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How do you define DFM?
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