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Posts tagged with 'smart fill'

14 Mar, 2014
IC Manufacturing

Are You ECO-Friendly?

Posted by Shelly Stalnaker

Shelly Stalnaker Every designer dreads the last-minute engineering change order, or ECO. Just when you think you’re done…you’re not. At 45nm and below, ECOs get even more difficult to implement, because fill now has a direct impact on design performance. A small re-routing can get complicated very quickly with the complex fill requirements of advanced nodes. Fortunately, help is available! On Semiconductor … Read More

P&R, Jeff Wilson, place and route, 45nm, 20nm, IC Design, smart fill, ic manufacturing, DRC, ECO fill

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