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Mentor Blogs

Posts tagged with 'SoC'

7 May, 2014
IC Design

Sinkhole or Springboard?

Posted by Shelly Stalnaker

Shelly Stalnaker Depending on how well your company implements it, verification can be a quagmire that slows down your design delivery and creates frustration and conflict between teams, or a springboard that lets you deliver high-quality designs ahead of your competition. In a recent interview with Pradeep Chakraborty, our CEO, Wally Rhines, discusses the intricacies of design verification today, the biggest verification … Read More

Semiconductors, Mentor Graphics, SoC, 16 nm, 20nm, 14nm, Walden C. Rhines, IC Design, Wally Rhines, IC Verification, design verification

14 Feb, 2014

Matt Radochonski At Embedded World in Nuremberg from Feb 25-27 we will have a number of demos to show off at the Mentor Embedded Booth.  Come join us in Hall 4, Booth 4-422 to see and learn more about: Delivering Powerful IoT Systems Connected devices range from wearables, to smart meters, to smart appliances, to connected vehicles. Design of these IoT devices requires minimizing memory footprint, seamlessly connecting … Read More

Multicore, low energy, Texas Instruments, TI, Android, internet-of-things, automotive linux, IoT, jacinto 6, am335x, Linux, connected vehicles, heterogeneous, Connectivity, hypervisor, i.mx6, Bluetooth, Infotainment, Freescale, Embedded World, GENIVI, stability, nanoblue, smart meter, SoC, sitara, smart appliances, nanopower, Nucleus

13 Dec, 2013

Shelly Stalnaker Jean-Marie Brunet examines the reasons why the “tapeout crunch” is getting worse and worse at advanced nodes, and suggests some possible solutions, in this forward-looking article written for SemiconductorEngineering.com. … Read More

DRC, digital IC, Foundry, tech files, tapeout, 14nm, rule decks, signoff, 16nm, SoC, 10nm, SVRF, IP, Design Rule Checking, P&R, router, 20nm, Routing, Debugging

30 Oct, 2013

Mark Olen MENTOR GRAPHICS AT ARM TECHCON This week ARM® TechCon® 2013 is being held at the Santa Clara Convention Center from Tuesday October 29 through Thursday October 31st, but don’t worry, there’s nothing to be scared about.  The theme is “Where Intelligence Counts”, and in fact as a platinum sponsor of the event, Mentor Graphics is excited to present no less than ten technical and training sessions about … Read More

testbench, SoC, Verification, Formal Verification, functional coverage, ARM, Verification Academy, iTBA, Functional Verification, Intelligent Testbench Automation

17 May, 2013

admin Integration and testing of IP blocks in large SOCs has been a manual, time consuming design effort. A new standard called IEEE P1687 (or "IJTAG") for IP plug-and-play integration was created to simplify these tasks and EDA tools are emerging to support the standard. IJTAG simplifies connecting any number of IJTAG-compliant IP blocks into an integrated, hierarchical network, allowing access … Read More

IJTAG, IP, IEEE P1687, JTAG, SoC

26 Jul, 2012

Mark Olen A system-level verification engineer once told me that his company consumes over 50% of its emulation capacity debugging failures. According to him there was just no way around consuming emulators while debugging their SoC design emulation runs. In fact when failures occur during emulation, verification engineers often turn to live debugging with JTAG interfaces to the Design Under Test. This enables … Read More

Functional Verification, Instant Replay, Emulation, Verification, Verification Academy, JTAG, SoC

26 Jul, 2012

Phil Burr

Today, more ‘things’ are connected to the Internet than there are people on the planet. Connectivity was a major theme at last week’s Freescale FTF event in San Antonio, Texas. There were over 1300 attendees, and around 200 technical sessions over the course of 4 days. An impressive range of SoC solutions aimed at connectivity covered such diverse applications, from Medical, Energy Management, Safety

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CAN/LIN, Medical, Energy, Freescale, Ethernet, Infotainment, MOST, IVI, SoC

29 Jun, 2012

Andrew Patterson Today, more ‘things’ are connected to the Internet than there are people on the planet. Connectivity was a major theme at last week’s Freescale FTF event in San Antonio, Texas. There were over 1300 attendees, and around 200 technical sessions over the course of 4 days. An impressive range of SoC solutions aimed at connectivity covered such diverse applications, from Medical, Energy Management, Safety … Read More

IVI, Infotainment, Medical, CAN/LIN, MOST, Freescale, SoC, Energy, Ethernet

21 Feb, 2012
Functional Verification

Tornado Alert!!!

Posted by Dennis Brophy

Dennis Brophy Is my car trying to tell me something? This past Friday was the beginning of a two day internal functional verification meeting at Mentor Graphics corporate headquarters on Intelligent Testbench Automation (iTBA).  (Mentor’s iTBA product, Questa inFact is hot and getting hotter.) After getting to my car to return home at the end of the first day, I was thinking that the large interest in this technology … Read More

UVM, Tipping Point, Veloce, inFact, Intelligent Testbench Automation, Crossing the Chasam, Questa, SoC, iTBA, OVM

13 Dec, 2011

Mark Olen

Instant Replay Offers Multiple Views at Any Speed If you’ve watched any professional sporting event on television lately, you’ve seen the pressure put on referees and umpires.  They have to make split-second decisions in real-time, having viewed ultra-high-speed action just a single time.  But watching at home on television, we get the luxury of viewing multiple replays of events in question

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Verification, testbench, SoC Level Verification, Cortex, ARM, Software as a Testbench, Functional Verification, SoC

15 Apr, 2011

Dennis Brophy Watch DVCon Co-Located Event Presentations Two presentations from the second annual SystemC Day at DVCon 2011 are available now.  The first presentation is the keynote by Jim Hogan, serial EDA entrepreneur at Vista Ventures, LLC and the second is an introduction to the emerging IEEE Std. 1666™, SystemC standard by Jim Aynsley at Doulos.  SystemC Day brought users together to discuss the current state … Read More

SystemC, esl, 1666, OSCI, SoC, Jim Aynsley, Jim Hogan

12 May, 2010

J VanDomelen Welcome to part two of my four-part (part one) ESC 2010 blog series. Today’s topic: shifts in the industry. One of the biggest trends I observed at the show was the start of a paradigm shift in the evolution of Electronic Design Automation (EDA) software companies and their products. EDA software companies have traditionally provided the software tools and services to create modern day semiconductors, … Read More

OS, Operating System, Android, middleware, app, Mil-Aero, Milaero, Military, Aerospace, drivers, Mentor, Mentor Graphics, app-driven, Mentor.com, apps, Google, Engineer, Hardware, SoC, System on Chip, Software, soldier

11 May, 2010

Simon Favre This week, I’m off to present a paper on Critical Area Analysis and Memory Redundancy. It’s at the 2010 IEEE North Atlantic Test Workshop in Hopewell Junction, NY, just up the road from Fishkill. IBM is in Fishkill. IBM invented CAA in what, the 1960’s? Venturing into IBM country to speak on Critical Area Analysis is kind of like being the court jester. I just hope they don’t say, “Off with his head.” … Read More

Redundancy, CAA, SoC, SRAM

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