Tornado Alert!!!
Is my car trying to tell me something?
This past Friday was the beginning of a two day internal functional verification meeting at Mentor Graphics corporate headquarters on Intelligent Testbench Automation (iTBA). (Mentor’s iTBA product, Questa inFact is hot and getting hotter.) After getting to my car to return home at the end of the first day, I was thinking that the large interest in this technology … Read More
Tags: UVM, Tipping Point, Veloce, inFact, Intelligent Testbench Automation, Crossing the Chasam, Questa, SoC, iTBA, OVM
Instant Replay Offers Multiple Views at Any Speed
If you’ve watched any professional sporting event on television lately, you’ve seen the pressure put on referees and umpires. They have to make split-second decisions in real-time, having viewed ultra-high-speed action just a single time. But watching at home on television, we get the luxury of viewing multiple replays of events in question … 
Welcome to part two of my four-part (part one) ESC 2010 blog series. Today’s topic: shifts in the industry. One of the biggest trends I observed at the show was the start of a paradigm shift in the evolution of Electronic Design Automation (EDA) software companies and their products.
EDA software companies have traditionally provided the software tools and services to create modern day semiconductors, … 
This week, I’m off to present a paper on Critical Area Analysis and Memory Redundancy. It’s at the 2010 IEEE North Atlantic Test Workshop in Hopewell Junction, NY, just up the road from Fishkill. IBM is in Fishkill. IBM invented CAA in what, the 1960’s? Venturing into IBM country to speak on Critical Area Analysis is kind of like being the court jester. I just hope they don’t say, “Off with his head.” … 
Design rule checking (DRC) or physical verification used to be easy. For example, run some 1-D width and spacing checks to ensure things will resolve and won’t short and you are good to go. These checks were simple to write, fast to run and understandable, and quick to debug. Today is a new world order, where none of these attributes are true anymore. An increasing number of checks are 2-D, very … 
Transaction-Based Verification is a technique for verifying modern SoC designs with interfaces such as PCI express, using test benches at the transaction level of abstraction. Transaction-based verification complements directed and constrained random tests, and is an emerging methodology for verifying complex SoCs that have multiple on-chip standard bus and peripheral interfaces. Typically in a transaction-based … 
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