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Mentor Blogs

Posts tagged with 'testability'

2 Oct, 2012

Mark Laing Hi there I spent last week in the wonderful town of Zug about 45 minutes from Zurich in Switzerland. My European colleagues organized a two day seminar for over 60 of our Valor MSS Process Preparation customers at the Siemens facility in Zug. The agenda consisted of some Valor presentations, Valor demostrations of the upcoming software, presentations by actual users of the Process Preparation software … Read More

programming, AVL, process, AOI, data preparation, documentation, Flying Probe, bill of materials, ICT, BOM, Design For Test, vPlan, testability, VPL, stencil

18 Sep, 2012

Mark Laing Hi there As a follow up to my posting last week on measuring test coverage, which you can read from the following link: http://www.mentor.com/pcb-manufacturing-assembly/blog/post/how-do-you-measure-test-coverage–77cbb106-851f-4f26-a548-4857098f23d4 I would like to hear from test and process engineers on what types of equipment form part of your test and inspection strategy. How do In-Circuit test … Read More

Design For Test, Flying Probe, AOI, testability, vPlan, ICT, data preparation, BOM, programming, boundary scan

7 Aug, 2012

Mark Laing Hi there I have covered a number of areas of process engineering in this blog over the past few months and there is now an opportunity to see how these areas all come together next week in our Webinar titled “World Class Process Preparation”. We will be discussing a number of ways that the users of Valor MSS can streamline their process preparation tasks to make them more efficient and reduce … Read More

Planning, AOI, mixed vendor, BOM, data preparation, documentation, AVL, Flying Probe, bill of materials, ICT, Design For Test, process preparation, vPlan, Webinar, testability, stencil, programming, Sequence

17 Jul, 2012

Mark Laing Hi there One of the least efficient areas in PCB assembly concerns the creation and management of package data that will be consumed across the shop-floor. For example DFM processes rely on accurate package data to determine component to component spacing issues or using accurate pin terminus contact data to ensure that solder joints will form correctly. Accurate package data is critical for DFT analysis … Read More

programming, AOI, bill of materials, mixed vendor, process, data preparation, documentation, Design For Test, Flying Probe, ICT, BOM, VPL, vPlan, stencil, testability

10 Jul, 2012

Mark Laing Hi there Within the Valor MSS Process Preparation suite, we have the best DFA capability that exists in the market. There are a number of checks that are performed that are necessary for PCB assemblers to execute prior to starting a design in production. Being able to know if fiducials on the board are near similar pads or vias is important to ensure that placement and inspection equipment don’t … Read More

Flying Probe, bill of materials, testability, vPlan, ICT, Design For Test, BOM, data preparation

19 Jun, 2012

Mark Laing Hi there Test Engineers are typically given the requirement to get 100% of nets probed at electrical test with the thinking that this delivers 100% testability. Unfortunately 100% accessibility is not the same as 100% testability. There are a number of reasons why this is not the case but here is a easy one. Typical boards contain integrated circuit (IC) components and power supplies. These power supplies … Read More

programming, data preparation, Design For Test, ICT, testability, Flying Probe

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