Posted Dec 13, 2011, by Mark Olen
Instant Replay Offers Multiple Views at Any Speed
If you’ve watched any professional sporting event on television lately, you’ve seen the pressure put on referees and umpires. They have to make split-second decisions in real-time, having viewed ultra-high-speed action just a single time. But watching at home on television, we get the luxury of viewing multiple replays of events in question … Read More
Tags:
Verification,
testbench,
Cortex,
Functional Verification,
ARM,
SoC Level Verification,
Software as a Testbench,
SoC
Posted Oct 13, 2011, by Dennis Brophy
Legacy’s Luster Lost
As a follow-on to my last blog, where I shared information about Harry Foster speaking live about the research he has been reporting on the last year and where I noted legacy might hold some back, I was going to finish on some of the work we have done at Mentor Graphics to move forward while trying to keep some of those held back by legacy, whole.
Buy why this title? For some, … Read More
Tags:
VHS,
Verification,
VIP-TSC,
betamax,
e,
Accellera,
UVM,
OVM
Posted Jul 26, 2011, by Mark Olen
Who Doesn’t Like Faster?
In my last blog post I introduced new technology called Intelligent Testbench Automation (“iTBA”). It’s generating lots of interest in the industry because just like constrained random testing (“CRT”), it can generate tons of tests for functional verification. But it has unique efficiencies that allow you to achieve coverage 10X to 100X … Read More
Tags:
Functional Verification,
Intelligent Testbench Automation,
Constrained Random Test,
testbench,
Verification,
iTBA
Posted Jun 28, 2011, by Mark Olen
iTBA Introduction
If you’ve been to DAC or DVCon during the past couple of years, you’ve probably at least heard of something new called “Intelligent Testbench Automation”. Well, it’s actually not really all that new, as the underlying principles have been used in compiler testing and some types of software testing for the past three decades, but its application to electronic design verification is … Read More
Tags:
Functional Verification,
Intelligent Testbench Automation,
functional coverage,
Verification,
Verification Academy,
testbench
Posted Jun 6, 2011, by Thomas Bollaert
One year ago, I was writing about the inclusion of Mentor ESL in the TSMC Reference Flow 11, and why the endorsement of system-level design and high-level synthesis by the world’s leading foundry was a telling sign of maturity for ESL.
Since this first major milestone, TSMC and Mentor haven’t remained idle, on the contrary. Both parties teamed-up to take this first ESL flow to a whole new … Read More
Tags:
Vista,
DAC,
esl,
Catapult C,
TSMC,
Verification,
High-Level Synthesis,
How-to
Posted Apr 20, 2011, by Harry Foster
Testbench Characteristics and Simulation Strategies (Continued)
This blog is a continuation of a series of blogs, which present the highlights from the 2010 Wilson Research Group Functional Verification Study (for a background on the study, click here).
In my previous blog (Part 6 click here), I focused on some of the 2010 Wilson Research Group findings related to testbench characteristics and simulation … Read More
Tags:
testbench,
Functional Verification,
Verification
Posted Apr 18, 2011, by Harry Foster
Testbench Characteristics and Simulation Strategies
This blog is a continuation of a series of blogs that present the highlights from the 2010 Wilson Research Group Functional Verification Study (for background on the study, click here).
In my previous blog (click here), I focused on the controversial topic of effort spent in verification. In this blog, I focus on some of the 2010 Wilson Research … Read More
Tags:
testbench,
Functional Verification,
Verification,
Wilson Research Group Study
Posted Apr 4, 2011, by Harry Foster
Effort Spent On Verification (Continued)
This blog is a continuation of a series of blogs, which present the highlights from the 2010 Wilson Research Group Functional Verification Study (for a background on the study, click here).
In my previous blog (click here), I focused on the controversial topic of effort spent in verification. This blog continues this discussion.
I stated in my previous … Read More
Tags:
Functional Verification,
Verification,
Formal Verification
Posted Apr 3, 2011, by Harry Foster
Effort Spent On Verification
This blog is a continuation of a series of blogs, which present the highlights from the 2010 Wilson Research Group Functional Verification Study (click here). In my previous blog (click here), I focused on design and verification reuse trends. In this blog, I focus on the controversial topic of amount of effort spent in verification.
I have been on the technical program … Read More
Tags:
Functional Verification,
Verification,
Add new tag
Posted Apr 1, 2011, by Harry Foster
Reuse Trends
This blog is a continuation of a series of blogs, which presents the highlights from the 2010 Wilson Research Group Functional Verification Study (click here). In this blog, I focus on design and verification reuse trends.
Design Composition Trends
Figure 1 shows the mean design composition trends, which compares the 2007 Far West Research study (in blue) with the 2010 Wilson Research … Read More
Tags:
Verification,
Functional Verification
Jim Martens
John Day
J VanDomelen
Nazita Saye
Michael Ford
Robin Bornoff
Mike Jensen
Colin Walls
Tom Fitzpatrick
Patrick Carrier
Mark Laing
Zhen Mu
Travis Mikjaniec
Christopher Hallinan
Bernard Sutton