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Mentor Blogs

Posts tagged with 'VHDL'

7 May, 2014

Joe Rodriguez My Feb. 4 post introduced Mentor Graphics’ three-step FPGA verification process intended to help design teams get out of the reprogrammable lab more effectively. Since then, I’ve engaged FPGA vendors, design managers and engineers to explain the process, paying special attention to the merits and technical detail for injecting automation into any FPGA verification environment, the hallmark of Mentor’s … Read More

Verilog, Verification, VHDL, Code Coverage, Coverage, Assertions, FPGA, Functional Verification

4 Feb, 2014

Joe Rodriguez Marketing teams at FPGA vendors have been busy as the silicon nanometer geometry race escalates. Altera is “delivering the unimaginable” while Xilinx is offering “all programmable SoCs” to design centers. It’s clear that the SoC has become more accessible to a broader market today and that FPGA vendors have staked out a solid technology roadmap for the near future. Do marketing … Read More

Verilog, Verification, VHDL, Code Coverage, Coverage, Assertions, FPGA, Functional Verification

5 Aug, 2013

Harry Foster Language and Library Trends This blog is a continuation of a series of blogs that present the highlights from the 2012 Wilson Research Group Functional Verification Study (for a background on the study, click here). In my previous blog (Part 7 click here), I focused on some of the 2012 Wilson Research Group findings related to testbench characteristics and simulation strategies. In this blog, I present … Read More

IEEE 1800, RTL, VHDL, 1364, testbench, Verification, Verification Academy, 1076, Verilog, Functional Verification, SystemC, Accellera, functional coverage

23 Apr, 2013

Harry Foster This is the first in a series of blogs that presents the results from the 2012 Wilson Research Group Functional Verification Study. Study Overview In 2002 and 2004, Ron Collett International, Inc. conducted its well known ASIC/IC functional verification studies, which provided invaluable insight into the state of the electronic industry and its trends in design and verification. However, after the 2004 … Read More

UVM, Assertion-Based Verification, Formal Verification, Accellera, Verification Academy, Verification Methodology, functional coverage, Verilog, Functional Verification, VHDL

15 Apr, 2013
Embedded Software

What is an FPGA?

Posted by Colin Walls

Colin Walls In the early days of embedded systems, software engineers typically had some understanding of hardware design. Indeed, in many cases, it was the hardware designer who implemented the software. Over the years, as the amount of software development has increased, engineers have become less and less “hardware aware”. I find this transition interesting from the viewpoint of an embedded software … Read More

Verilog, RTOS, VHDL, FPGA, MicroBlaze, NIOS, Nucleus

24 Jan, 2013

Dennis Brophy

VHDL-2008 Explained Via 7 Course Modules For some time now a dedicated group of engineers have defined and standardized an important update to the VHDL standard.  Also know as IEEE Std. 1076™-2008, this update to VHDL took an interesting path to get to where it is today.  The VHDL standards team started the standards development work in the IEEE but sought additional input and standards project funding

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ieee 1076, VHDL, iec, Verification Academy

28 Aug, 2012

Dennis Brophy Five Leading Global Organizations Affirm “The Modern Paradigm for Standards” The EDA industry has seen changes to the international standards paradigm the past few decades.   When industry helped launch VHDL with the help of government support, it transferred ongoing maintenance and enhancement to the IEEE when it completed its first version.  In addition to anchoring the standard at the IEEE, … Read More

VHDL, IAB, iec, Accellera, W3C, ITEF, Open Stand, Internet Society

6 Feb, 2012
Embedded Software

More on System-C

Posted by Colin Walls

Colin Walls

Some weeks ago, I published a posting from my colleague Richard Vlamynck, who was explaining the ideas behind System-C and modeling at different levels of abstraction. He promised to write more and I was very pleased to receive a new contribution … It’s just me again, blogging about hardware models in general and System-C in particular. Earlier, I’d mentioned the fact that System-C can be used

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VHDL, System-C, Precision, Handel-C, Verilog

28 Nov, 2011

Colin Walls I recent wrote about the similarity in software and hardware design, as they are both performed by writing code in a high level programming language. My colleague Richard Vlamynck, wrote to me, suggesting that he might be able to usefully expand on this topic. He is an unusual guy, even within Mentor Graphics, as he is a modern day “Renaissance man” – he has a very good understanding … Read More

Precision, VHDL, System-C

31 Oct, 2011

Colin Walls As I work for a company that has traditionally had a strong focus on hardware design, I am particularly interested in the relationship between hardware and software development and the synergies between the two disciplines. Previously, I have discussed the dominance of software in modern designs [here] and the relationships in the EDA world [here]. But today I want to think about how hardware guys actually … Read More

Hardware, Verilog, VHDL, hardware design

22 Jul, 2011

Dennis Brophy Historical Perspective In my early days of standards development, I was intrigued how a standard went from the development phase to use phase.  New standards were heralded with great fanfare but were also followed very quickly with books and other material to allow the “mere mortal” to understand what the IEEE standards prose meant and how best to use it.  Everyone had their favorite VHDL book and I … Read More

VITAL, VHDL, VMM, OVM, Accellera, UVM, UVM World, OVM World

17 Jun, 2011

Dennis Brophy How do your favorites rank? Have you ever wondered how popular the different IEEE standards for electronic design automation are? Have you ever wondered which ones show the least interest? When buying books online, popular book buying websites sites will rank customer purchases. Many newspapers manage lists that you can consult to determine what is the most popular; what has the highest demand. But … Read More

SystemC, Verilog, 1076.4, 1364, 1076, VHDL, IP-XACT, VITAL

25 Mar, 2011

Dennis Brophy Wally Rhines DVCon 2011 Keynote Highlights Survey on Verification Languages OK, maybe it is not the Dawning of the Age of Aquarius, but Wally Rhines’ DVCon 2011 keynote did have a slide titled “SystemVerilog in the Ascendancy.”  It is not a word I see or use much.  In fact, Google labs’ “Book Ngram Viewer” shows ascendancy has been in decline since around 1825. It struck me that the title was tending … Read More

OVM, DVCon, VHDL, Wally Rhines, UVM, Verification

11 Oct, 2010

Dennis Brophy United States Plays Host in Seattle, WA The IEC’s 47th General Assembly meeting opened on October 11th in Seattle, WA USA.  Plans had been put in place for about 2,500 delegates but that number was exceeded by nearly 25% with more than 3,100 people registered.  Three days before the start of the meeting the Technical Committee 93, which addresses all the design automation standards held seven working … Read More

1364, 1666, 1076, iec, TC93, Verilog, VHDL, dual-logo, WG2

25 Feb, 2010
Functional Verification

I Do It …

Posted by Dennis Brophy

Dennis Brophy … To Advance Technology for Humanity It is a humbling honor to have been elected chair of the IEEE Standards Association’s (SA) Corporate Advisory Group (CAG).  While Corporate Membership in the IEEE SA has been an element of the organization from its inception, it has only been in recent years that it has started to bring the voice of global industry into the IEEE’s standards making process.  As … Read More

VHDL, Accellera, 1076, CAG

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