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Posts tagged with 'Wally Rhines'

7 May, 2014
IC Design

Sinkhole or Springboard?

Posted by Shelly Stalnaker

Shelly Stalnaker Depending on how well your company implements it, verification can be a quagmire that slows down your design delivery and creates frustration and conflict between teams, or a springboard that lets you deliver high-quality designs ahead of your competition. In a recent interview with Pradeep Chakraborty, our CEO, Wally Rhines, discusses the intricacies of design verification today, the biggest verification … Read More

Semiconductors, Mentor Graphics, SoC, 16 nm, 20nm, 14nm, Walden C. Rhines, IC Design, Wally Rhines, IC Verification, design verification

29 Mar, 2013

J VanDomelen Hundreds of military and aerospace (mil/aero) design engineers, engineering managers, and executives flocked to Dallas last week to attend Mentor Graphics’ annual Integrated Electrical Solutions Forum (IESF) focused on mil/aero applications, trends, and technologies. Mentor Graphics Chairman and Chief Executive Officer Wally Rhines opened the annual event with an interesting keynote address on: Meeting … Read More

Hardware, Geek, IESF, Wally Rhines, Technology, Mil-Aero, Milaero, Military, Aerospace, Software, Integrated Electrical Solutions Forum, electrical, Mentor, Electronic, Mentor Graphics, Electric, Mentor.com, Electric Aircraft

19 Feb, 2013

Dennis Brophy Learn about new standards, industry surveys and trends This year’s DVCon is set and if you have not yet registered, you can do it now – or just show up!  If you want to secure seating at some of the Monday tutorial events, I strongly encourage pre-registration to ensure you can secure a seat.  And if you just want to see the exhibits and chat with suppliers, that’s free. The IEEE low power format is … Read More

IEEE 1801, Low Power, Harry Foster, Wally Rhines, UPF

25 Mar, 2011

Dennis Brophy Wally Rhines DVCon 2011 Keynote Highlights Survey on Verification Languages OK, maybe it is not the Dawning of the Age of Aquarius, but Wally Rhines’ DVCon 2011 keynote did have a slide titled “SystemVerilog in the Ascendancy.”  It is not a word I see or use much.  In fact, Google labs’ “Book Ngram Viewer” shows ascendancy has been in decline since around 1825. It struck me that the title was tending … Read More

OVM, DVCon, VHDL, Wally Rhines, UVM, Verification

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