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Mentor Graphics Donation of SystemVerilog Assertion Version of Open Verification Library Accepted by Accellera

WILSONVILLE, Ore. March 30, 2005 - Mentor Graphics Corporation (Nasdaq: MENT) today announced that it has donated and received acceptance of its SystemVerilog Assertion (SVA) version of the Open Verification Library (OVL) to Accellera, the organization for electronic design industry standards. Mentor Graphics 0-In verification business unit developed the industry's first and most widely used assertion library for functional verification and is the leading supplier of assertion-based verification (ABV) tools. The donated library is designed for use with multiple verification technologies including simulation, formal verification and emulation.

"Accellera is pleased to receive this SVA donation from Mentor Graphics. Mentor's strong commitment and leadership in standards, combined with their expertise in assertions, will be invaluable to the committee going forward," stated Bryan Bullis, chairman of the OVL committee of Accellera. "This donation provides the foundation for a high quality, standards-based assertion library solution to improve the verification productivity of all design teams. The Accellera committee, combined with Mentor's commitment to work within the technical committees, will help accelerate the adoption of SystemVerilog and ABV."

The Accellera OVL committee also approved the creation of a new subcommittee for the OVL-SVA library, to be chaired by Mentor. This subcommittee will be responsible for delivering an Accellera standard library and maintain and enhance the OVL-SVA library over time.

"Assertion-based verification is rapidly becoming the standard verification methodology for many teams working on System-on-Chip (SoC) and ASIC designs," said Robert Hum, vice president and general manager Mentor Graphics Design Verification and Test division. "With Mentor Graphics' strong commitment to industry standards, it was natural for us to kick-start the standardization with a donation of an assertion library written with SystemVerilog Assertion that is consistent and compatible with the existing OVL."

About Accellera

Accellera provides design standards for quick availability and use in the electronics industry. The organization and its members cooperatively deliver much-needed EDA standards that lower the cost of designing commercial IC and EDA products. As a result of Accellera's partnership with the IEEE, Accellera standards are provided to the IEEE standards body for formalization and ongoing change control. For more information about Accellera, please visit: www.accellera.org.

About Mentor Graphics

Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of over $700 million and employs approximately 3,850 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: http://www.mentor.com.

Mentor Graphics and 0-In are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.

For more information, please contact:

Larry Toda
503.685.1664
larry_toda@mentor.com

Ryerson Schwark
503.685.1660
ry_schwark@mentor.com



 
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