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AMCC Standardizes on Mentor Graphics’ Questa Platform, Advanced Verification Methodology (AVM), and SystemVerilog

Mentor Consulting Services Facilitates Transition from “e” to SystemVerilog

WILSONVILLE, Ore., October 30, 2006– Mentor Graphics Corporation (Nasdaq: MENT) today announced that Applied Micro Circuits Corporation (AMCC) (Nasdaq: AMCC) has consolidated their functional verification activities and flow on the Mentor Graphics® Questa™ next-generation functional verification platform and Mentor’s Advanced Verification Methodology (AVM). AMCC, a global leader in network and embedded PowerPC, optical transport and storage technologies, required a consolidated functional verification solution. This solution was provided using SystemVerilog as the language, AVM as the methodology, and Questa as the platform. The conversion from a legacy “e” environment to SystemVerilog was expedited by Mentor Consulting Services.

“Mentor provided the tools, methodology and expertise necessary to help us meet our goal of moving from a proprietary ‘e’-based flow to an advanced verification environment based on the SystemVerilog language,” stated Robert Bagheri, AMCC senior vice president of operations. “When making such a move, it’s important to select a vendor who is both committed to, and capable of, making you successful. Mentor worked with us to implement both our short term requirements, and to understand our future vision for our internal verification framework. They are enabling us to move toward this vision.”

“Mentor’s close working relationship with AMCC, where effective verification is recognized as essential to their overall success, is the best way to make real industry progress towards closing the gap between design and verification schedules.” said Robert Hum, vice president and general manager of Mentor Graphics Design Verification and Test division, “We are pleased to collaborate with companies like AMCC, where the end result of our joint efforts is a more effective verification solution than either party could have implemented on their own.”

AMCC converted their functional verification flow to SystemVerilog and Mentor’s AVM. This solution provides advanced verification features that can be applied to every facet of AMCC’s global design and verification teams — maximizing reuse of verification IP, knowledge transfer and efficiency, while minimizing the need for separate training. Mentor Consulting delivered SystemVerilog code to AMCC, incorporating the AMCC Verification Framework (AVF) into the AVM library package. This resulted in a unified library for functional verification using SystemVerilog. Running on the Questa platform, this solution includes the ability to integrate assertion-based verification within coverage-driven verification, and formal proofs using Mentor Graphics 0-In™ formal verification tools.

The Questa platform support for the SystemVerilog standard, including unified debug, coverage, reporting, and assertion support, allowed AMCC to integrate the different tool sets within a single source for both simulation and formal verification. “The AVM delivered a pre-defined library and an efficient way to use tools and standards in order to jump-start our conversion to SystemVerilog,” stated Pete LaFauci, AMCC senior principal designer. “Mentor Consulting tied it all together. They were very pro-active in understanding our requirements and our challenges. Being able to describe our problem to somebody who understood what the challenges were, through other experiences, was tremendous.”

About the AVM
Announced in May 2006, the Mentor Graphics AVM is the first true system-level-to-RTL verification methodology, integrating advanced verification techniques like constrained-random stimulus, functional coverage and assertions into a single transaction level modeling (TLM)-based framework implemented in both SystemC and SystemVerilog. It features an object-oriented coding style to reduce the amount of testbench code and a modular architecture to enable reuse. The AVM consists of the AVM Cookbook, a "how-to" guide for getting started, and source code for base class libraries, utilities, and implementation examples written in both SystemC and SystemVerilog. To access the Mentor Graphics AVM visit: http://www.mentor.com/go/cookbook

About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of over $725 million and employs approximately 4,050 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.

Mentor Graphics and 0-In and are registered trademarks and Questa is a trademark of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.

For more information, please contact:
Larry Toda
Mentor Graphics
503-685-1664
larry_toda@mentor.com

Ryerson Schwark
Mentor Graphics
503-685-1660
ry_schwark@mentor.com

 
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