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Mentor DFM Analysis Service Delivers Calibre Litho Checks for TSMC 40nm and 28nm Customers

Thu, 24 May 2012 13:00:00 GMT

WILSONVILLE, Ore., May 24, 2012 - Mentor Graphics Corporation (NASDAQ: MENT) today announced the availability of a new DFM Analysis Service based on the Calibre® platform for TSMC 40nm and 28nm foundry customers. The service analyzes the customer’s design database in accordance with TSMC’s lithography process checking (LPC) flow. It then delivers a results database with hotspot locations and fixing hints that routers can use to perform corrections. This DFM approach is an attractive alternative for designers taping out relatively few advanced node devices per year.

Mentor Graphics and AT&S Announce Embedded Component Package (ECP) Technology Partnership to Optimize PCB Design-Through-Manufacturing Flow

Thu, 24 May 2012 13:00:00 GMT

WILSONVILLE, Ore., May 24, 2012—Mentor Graphics Corporation (NASDAQ: MENT), the market and technology leader in printed circuit board (PCB) design solutions, today announced the technology collaboration with the AT&S (Austria Technologie & Systemtechnik) Embedded Component Package (ECP®) process for Mentor Graphics® PCB design-through-manufacturing flow. AT&S’ advanced ECP technology for microelectronic component packaging leverages embedded bare die and discrete passives into the core of a PCB, reducing the package form factor by 30-50% for improved functionality and system performance. Now, with the Mentor® Expedition® Enterprise flow, designers are able to implement AT&S’s advanced technology on their PCB cores up to 40% faster and with improved quality than with previous design tools. As a result, PCB designers using ECP technology will realize improved electrical performance, thermal management, miniaturization, cost efficiency and overall product quality, with significant time reduction.

SMIC Employs Mentor Graphics Calibre PERC for Reliability Verification of Multi-Power Domain SoCs

Tue, 22 May 2012 13:00:00 GMT

WILSONVILLE, Ore., and Shanghai, China, May 22, 2012 — Mentor Graphics Corp. (NASDAQ: MENT) and Semiconductor Manufacturing International Corporation ("SMIC"; NYSE: SMI; SEHK: 0981.HK) today announced that SMIC is using the Calibre® PERC circuit reliability verification solution as part of its latest electrostatic discharge (ESD) protection design methodology. SMIC’s approach helps ensure whole chip ESD protection for its customers’ large, complex SoCs, including all I/Os, embedded IP blocks from SMIC or third party sources, and eFuse embedded memory. SMIC adopted the Calibre PERC solution because it provides the unique ability to automatically combine schematic (netlist) and physical layout criteria and measurements to perform advanced reliability checks that until now were primarily done manually.

GLOBALFOUNDRIES Improves IC Reliability with Customized Circuit Checks Using Mentor Graphics Calibre PERC

Tue, 22 May 2012 13:00:00 GMT

WILSONVILLE, Ore., May 22, 2012 — Mentor Graphics Corp. (NASDAQ: MENT) today announced that GLOBALFOUNDRIES is helping its customers improve reliability checking by adding Calibre® PERC to select 28nm bulk CMOS design enablement flows. Calibre PERC will give designers access to the new reliability verification rules developed by the IBM Semiconductor Development Alliance (ISDA), augmented with GLOBALFOUNDRIES specific checks to help prevent external latch-up. Using Calibre PERC’s unique architecture, complex reliability rules that require the integration of logical (net list) and layout (GDS) information can be fully automated, eliminating manual spreadsheet-based efforts and reducing the chances of design errors.

TowerJazz Finds a Unique Solution for Advanced ESD and Power Domain Checking in Calibre PERC

Tue, 22 May 2012 13:00:00 GMT

WILSONVILLE, Ore., and NEWPORT BEACH, Calif., May 22, 2012—Mentor Graphics Corporation (NASDAQ: MENT) today announced that specialty foundry TowerJazz has selected the Calibre® PERC product to perform circuit reliability verification for its latest 0.13 and 0.18 micron products, including highly customized electrostatic discharge (ESD) and power management circuit checks. The Calibre PERC solution provides the unique ability to combine schematic (netlist) and physical layout criteria and measurements to perform advanced checks that were previously done manually because they were difficult or impossible to automate.

Mentor Graphics Hires Embedded Software Veteran to Lead RTOS, Middleware and User Interface Product Lines

Fri, 18 May 2012 13:00:00 GMT

WILSONVILLE, Ore., May 18, 2012— Mentor Graphics Corporation (NASDAQ: MENT) today announced the appointment of Scot Morrison as the Mentor Embedded general manager of Embedded Runtime Solutions. Scot was most recently general manager and senior vice president at Wind River Systems where he was responsible for operating systems and associated middleware and tools. He will work closely with the Mentor® open source solutions, and simulation and virtual platforms management teams, to help drive the Mentor embedded software strategies.

Professional Circuit Designs, Ltd. Standardizes on Mentor Graphics PCB Design-Through-Manufacturing Technologies for Design and Consulting Services

Wed, 16 May 2012 13:00:00 GMT

WILSONVILLE, Oregon, May 16th, 2012 – Mentor Graphics Corporation, (NASDAQ: MENT), the worldwide market and technology leader in printed circuit board (PCB) design-through-manufacturing software, today announced that Professional Circuit Designs (PCD), Ltd., based in Winchester, U.K. has standardized on the Mentor Graphics® PCB design-through-manufacturing product flow, including the Valor® NPI tool. PCD specializes in PCB place & route, schematic entry, pre- and post-layout of PCB signal integrity simulation, library development and now new product introduction (NPI) design checking for PCB manufacturing and assembly.

Vestel Electronics Launches Advanced Set-Top-Box Using Mentor Graphics Inflexion User Interface Technology

Wed, 16 May 2012 13:00:00 GMT

WILSONVILLE, Ore., May 16, 2012—Mentor Graphics Corporation (NASDAQ: MENT) today announced that Vestel Electronics, one of Europe’s largest set-top-box (STB) manufacturers, developed its user interface (UI) for its new generation Android-based STB using the Mentor® Embedded Inflexion® UI product. With the Inflexion UI technology, Vestel quickly created a rich user interface that includes 3D perspectives, and mirrored like surfaces. The STB’s graphics hardware acceleration capability is unlocked by the Inflexion UI tool enabling Vestel to deliver these advanced features, fluid graphics, and transitions to its STB customers.

Mentor Graphics Launches Next Generation Veloce2 Emulation Platform with VirtuaLAB Capabilities

Wed, 25 Apr 2012 13:00:00 GMT

WILSONVILLE, Ore., April 25, 2012—Mentor Graphics Corp. (NASDAQ: MENT), a leader in high-performance system verification solutions, today announced the availability of the Veloce®2 platform, the next-generation of emulation solutions for the verification of electronic system and Systems on Chip (SoC) designs. Built to accommodate up to two billion gate designs, the Veloce2 platform delivers twice the performance, twice the capacity and four times productivity gain in the same footprint and power consumption as the first-generation Veloce platform. In addition, a new concept called Veloce VirtuaLAB gives verification engineers access to easy-to-use, software-based peripherals, connected to the Veloce platform, which provide a “virtual lab” environment to verify complex electronics systems including the embedded software and the SoCs that make up the system prior to first silicon availability.

Mentor Graphics Adds MIPI Protocol Verification IP to the Questa Verification IP Library

Thu, 19 Apr 2012 13:00:00 GMT

WILSONVILLE, Ore., April 19, 2012—Mentor Graphics Corporation (NASDAQ: MENT) today announced that Questa® Verification IP (VIP) now supports several MIPI Alliance specifications, including CSI, DSI and the recently announced LLI. As a Contributor Member in MIPI Alliance, Mentor sees the standardization of interfaces targeted for use in mobile devices as a step forward for the industry, decreasing time to market, reducing costs and improving interoperability. With this release of Questa VIP, designers can now rapidly verify the correct interpretation of several MIPI specifications. This allows less time to be spent developing the interface logic, and more time to be spent on the key differentiating functionality within the design.