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IEEE Recognizes Mentor Graphics’ Dennis Brophy and Dave Rich for Contributions to SystemVerilog Standard

WILSONVILLE, Ore., Jan. 20, 2006- Mentor Graphics Corporation (Nasdaq: MENT) today announced that Dennis Brophy and Dave Rich have received the IEEE Working Group Chairman's Award for their contributions to the IEEE Std. 1800-2005 "SystemVerilog" standard. The award, which was presented by IEEE 1800 Working Group Chairman Johny Srouji, took place at a ceremony held yesterday in San Jose. Brophy's and Rich's recognition further establishes Mentor Graphics' leadership in SystemVerilog development and adoption since the IEEE 1800 standard is critical for new verification methodologies. The award was given to only seven out of over one hundred individuals who serve on various IEEE committees.

Dave Rich, Mentor Graphics Design Verification and Test Division verification technologist, having served on several IEEE and Accellera technical committees, has expert knowledge of design languages. Rich was involved in the development of Superlog, the predecessor to SystemVerilog. For the IEEE 1800 Working Group, he developed a significant number of technical enhancements, corrections, and clarifications that were incorporated into the newly delivered standard. Rich has been instrumental in reviewing the work across all technical committees for this new SystemVerilog standard.

Dennis Brophy, Mentor Graphics Design Verification and Test Division director of strategic business development and secretary of the IEEE 1800 Working Group, received the IEEE Award for his ability to drive industry-wide consensus with EDA vendors, system houses, and semiconductor suppliers who participated in the IEEE 1800 initiative. He is also a board member of the IEEE Standards Association and its Corporate Advisory Group. He is a major catalyst to fostering the use of the IEEE Corporate Program for EDA standards and has helped forge a strong relationship between the IEEE and Accellera. Brophy is past chairman of Accellera and now serves as Accellera's Vice-Chairman.

"We are indebted to Mentor, Dennis and Dave for contributing to the successful delivery of IEEE Std. 1800-2005," said Johny Srouji, chairman of the SystemVerilog 1800 Working Group and Verilog 1364 Working Group. "Their efforts to establish SystemVerilog as a key design and verification language help engineers deal with more complex design configurations, greater logic functionality, and a higher abstract representation of the design, using fewer lines of register transfer level code."

Mentor Graphics has recognized the importance of SystemVerilog by being the first EDA vendor to fully support this standard. Mentor's recently announced Questa™ verification platform supports the new IEEE 1800 standard by providing design and testbench constructs, assertions,and the Direct Programming Interface (DPI) within a single-kernel solution. SystemVerilog is supported by a broad range of Mentor products, such as ModelSim®, ADVance™ MS, VStation™ TBX and Precision® RTL Synthesis.

About the IEEE SystemVerilog 1800 Standard
The IEEE SystemVerilog 1800 standard enables productivity for hardware design, specification, simulation and validation, especially for large-gate-count, IP-based, bus-intensive chips. Based on the SystemVerilog 3.1, a hardware description and verification language (HDVL) from the Accellera, it includes features such as advanced design modeling capabilities, testbench constructs, verification methods using assertion and testbench language, and a richer coupling with other languages such as C/C++. This unified standard gives the electronic design, semiconductor and system design communities a way to make design, simulation, validation and assertion-based verification work flows more efficiently. IEEE Std. 1800-2005 is available now for purchase from "ShopIEEE" at

About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $700 million and employs approximately 3,950 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site:

For more information, please contact:

Larry Toda
Mentor Graphics

Ry Schwark
Mentor Graphics

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