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Mentor Graphics and LSI Logic Announce Seamless Product Support for ZSP Processor Cores

WILSONVILLE, Ore., May 4, 2005 - Mentor Graphics{reg} Corp. (Nasdaq: MENT) and LSI Logic Corporation (NYSE: LSI) today announced new Seamless{reg} processor support packages (PSPs) for the LSI Logic ZSP400 and ZSP500 digital signal processor (DSP) cores. Utilizing the Seamless PSPs with the ZSP cores, designers have a platform in which to concurrently develop hardware and software in complex SoCs, saving time and money, and validating that hardware and software are synchronized before prototypes are manufactured.

"Seamless has become an important part of the verification flow for the SoCs we design," said Ai Wei, vice president of HiSilicon Technologies Co., Ltd. (formerly Huawei Technologies ASIC Design Center). "LSI Logic and Mentor's collaboration in delivering Seamless models for the ZSP cores enables us to efficiently verify the hardware and software in systems that embed them."

"Seamless provides complete hardware/software co-verification coverage for SoC designers utilizing the ZSP cores. Seamless productivity enhancements enable customers to verify their system in a fraction of the time required by traditional RTL co-simulation approaches," said Tuan Dao, vice president and general manager of ZSP Product Division, LSI Logic Corp. "By easing the co-verification burden, Mentor Graphics allows our customers to achieve design closure quickly and correctly, enabling the successful deployment of ZSP-based products to the market."

The cost, power and performance optimization of the ZSP400 and ZSP500 cores make them the licensed DSP of choice for software-intensive applications such as those in wireless, voice and multimedia. The Seamless product provides designers of these emerging applications with unparalleled ability to debug hardware/software interactions while exercising production-level software running on the Seamless model of the ZSP core. The Seamless product's performance profiling capabilities provide accurate measurement of key design parameters, such as bus, memory and software performance, enabling users to evaluate system performance before committing to hardware.

"By enhancing its DSP architecture with robust tools and solutions, such as the Seamless PSPs, the LSI Logic ZSP Division is demonstrating its commitment to the market and its strength as a leader in licensing DSP cores and software," said Serge Leef, general manager of the Mentor Graphics SoC Verification Division. "Mentor Graphics is pleased to support the ZSP family of cores as we see growing demand for co-verification solutions supporting these embedded devices."

LSI Logic and Mentor Graphics will bring their SoC expertise together with ARM for two seminars in California titled "Enabling Innovation: SoC Design and Verification Solutions from the Industry Leaders." More information on these seminars is available at http://www.mentor.com/products/fv/events/enabling_innovation.cfm

Availability

Seamless PSPs for the ZSP400 and ZSP500 DSP cores are available from Mentor Graphics. For technical and pricing information, please email seamless_info@mentor.com. To find additional product information and white papers, register for free Seamless workshops and functional verification seminars, please visit www.mentor.com/products/fv/hwsw_coverification/. For information on the ZSP signal processing solutions, visit www.zsp.com.

About the LSI Logic ZSP Products Division

The LSI Logic ZSP Products Division is a leading licensor of Signal Processing Cores and Solutions. The ZSP Processor Architecture is gaining considerable momentum as the DSP of choice in many key vertical markets including 3G wireless handsets, multimedia and networked voice appliances. The ZSP roadmap offers a range of software compatible cores delivering performance points that meet the cost, power and efficiency constraints of today's SoC designs. A number of standard products are also available for lower volume designs and prototype implementations. ZSP Solution Partners augment the technology with world-class software tools, EDA modeling support and a large portfolio of application software. LSI Logic is headquartered at 1621 Barber Lane, Milpitas, CA 95035.

About Mentor Graphics

Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of over $700 million and employs approximately 3,850 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.

Mentor Graphics and Seamless are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.

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For more information, please contact:

Nathan James
Mentor Graphics
503.685.0449
nathan_james@mentor.com

Lisa Robinson
LSI Logic Corp.
408.433.8728
lrobins@lsil.com