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The Open SystemC Initiative Announces Availability of the SystemC Transaction-level Modeling Standard with Broad Industry Support

San Jose, Calif. - June 6, 2005 - The Open SystemC Initiative (OSCI) today announced the delivery of the SystemC™ Transaction-level Modeling (TLM) Standard 1.0. The availability of a standard SystemC TLM library promotes industry-wide re-use of transaction-level Intellectual Property (IP) and the development of tools to provide a rich design environment for transaction-level design and verification.

The new TLM standard defines application programming interfaces (APIs) and provides a library that implements a foundation layer upon which interoperable transaction-level communication can be built. The standard, along with the library implementation can be downloaded under the open source license at

Design at the transaction-level enables users to efficiently develop system-on-chip (SoC) virtual prototypes to assist in architecture analysis and enable early software development, before availability of any physical prototype. Transaction-level IP models are also ideal golden reference models that can be directly embedded into functional verification environments, maximizing investments in high-level models. In addition, transaction-level modeling increases simulation performance more than 100 fold making it possible to meaningfully validate system functionality. These high simulation speeds are also required for the validation of IP in the context of the system. SystemC's ability to effectively span abstraction levels from algorithm to TLM and RTL makes it the ideal framework for high-level modeling as well as system validation.

"The SystemC TLM 1.0 kit was unanimously approved by the OSCI's Steering Group and Board for public release on the SystemC website," said Mark Milligan, OSCI president. "We are pleased to note that today it is in use at major companies, with the intent to use it as a corporate-wide standard."

"More than 50 TLM working-group members have worked for over two years in development and review of the standard APIs and open source library. OSCI is delivering a canonical TLM foundation that enables the industry to widely adopt Transaction-Level Modeling techniques," said Frank Ghenassia, OSCI TLM Working Group chair.

"This standard is the result of a number of companies cooperating in the definition and necessary documentation. It is another step in enabling both ecosystems and interoperability between companies to grow. Building on this standard, system-level simulation will take another step in becoming an accepted phase in the development of complex SoC system designs," said Ralph von Vignau, an OSCI Board member.

With this new standard being met with support from a broad range of semiconductor companies and EDA suppliers, users have a wide choice in vendors supporting this flow. Companies and organizations endorsing this standard include Cadence Design Systems, CoWare, Forte Design Systems, Mentor Graphics, Royal Philips Electronics, STMicroelectronics, Synopsys, Inc., Atrenta, Inc., Calypto Design Systems, Inc., Celoxica Ltd, ChipVision Design Automation AG, Synfora, Inc., Summit Design Automation, Inc and OCP-IP.

To download an open source license of the new TLM standard and library implementation visit

About SystemC and OSCI
The Open SystemC™ Initiative (OSCI) is an independent, not-for-profit association composed of a broad range of organizations dedicated to supporting and advancing SystemC as an open industry standard for system-level modeling, design and verification. The SystemC language and its proof-of-concept open source implementation can be downloaded at

All trademarks or registered trademarks mentioned in this news release are the intellectual property of their respective owners.

Supporting Quotes from OSCI Members and Industry Organizations

This new TLM standard is being met with a groundswell of support from a broad range of semiconductor companies and EDA suppliers including:

OSCI Corporate Members

Cadence Design Systems, Inc.
"Cadence has been a principal developer of the SystemC TLM library and is currently supporting several major IC vendors who use it as part of their design flow," said Moshe Gavrielov, executive vice president of Cadence Verification Division at Cadence Design Systems, Inc. "Cadence sees the standardization of this technology, raising the level of abstraction significantly above RTL as signaling the next phase of electronic design; transistor--> gates--->RTL--->TLM. Cadence will continue to support such abstract modeling tools as part of the Incisive multi-language design and verification platform."

For a direct quote and further information contact:

Ric Chope
Press Relations
phone: +1.650.934.6820

CoWare, Inc.
"At CoWare, we are fully committed to open, standards-based tools. We are delighted to have been a part of the multi-company cooperative effort that resulted in a standardized foundation layer for TLM. Additionally, we showed that OCP-IP's valuable TLM work can be mapped onto this standard foundation. We are further demonstrating our commitment to standards to our customers, who are already experiencing the many benefits of TLM-based design, by fully supporting the SystemC TLM library in our ConvergenSC tools." - Pete Hardee, Director, Solutions Marketing, CoWare, Inc.

For a direct quote and further information contact:

Pete Hardee
Director, Solutions Marketing
Phone: +1.408.392. 8514

Forte Design Systems, Inc.
"The movement to the transaction-level has already been demonstrated to provide impressive benefits for system design and validation. We participated in this development to build a single TLM standard that suppliers such as Forte can use to extend these benefits into the implementation realm." - Michael Meredith, Vice President of Technical Marketing, Forte Design Systems and Executive Director of OSCI.

For a direct quote and further information contact:

Mike Meredith
VP Technical Marketing
Phone: +1.425.869.4227 x104

Mentor Graphics Corporation
"The TLM layer allows designers to easily explore different architectural approaches and quickly verify the impact on critical design parameters. As an industry leader in standards, Mentor Graphics provides solutions for design, synthesis and verification that leverage the strengths of SystemC," stated Robert Hum, vice president and general manager of Mentor Graphics Design Verification and Test division. "OSCI's new TLM standard moves the electronics industry much closer to the goal of ESL design, enabling designers to produce better systems, faster, and with less manual design effort."

For a direct quote and further information contact:

Larry Toda Sr.
Marcom Manager
Phone: +1.503.685.1664

Royal Philips Electronics
"The SystemC TLM standard has been embraced by Philips," said Lambert van den Hoven, vice president responsible for Design Technology at Philips Semiconductors. "TLM is no longer a research topic. We are deploying system-level design using SystemC transaction-level models in production flows enabling re-use at a much higher abstraction level thereby boosting design productivity. SystemC is rapidly becoming an integral part of the Philips SoC development environment and will be available to all development groups."

For a direct quote and further information contact:

Lambert van den Hoven
Vice President, Design Technology
Phone: +31.40.2. 23841

"ST has been addressing the complexity of System-On-Chip (SoC) design and reducing time to market through the production use of transaction level modeling using the SystemC language for the last four years, applying SystemC TLM on several very complex production SoCs. We are now migrating our environment to use the OSCI TLM standard and expect our suppliers and partners to deliver system IP models based on this standard," said Philippe Magarshack, Group Vice President and Central CAD General Manager at STMicroelectronics, an OSCI Corporate member."

For a direct quote and further information contact:

Michael Markowitz
Director of WW Technical Media Relations
Phone: +1.212.821.8959

Synopsys, Inc.
"The TLM models are fully supported by Synopsys' System Studio architecture design and analysis tool, a key component of the Discovery™ Verification Platform," said Farhad Hayat, vice president of Marketing, Verification Group, Synopsys, Inc. "This standard unifies the transaction-level modeling methodology for SoC architectures at the very moment that the SystemVerilog language is gaining traction with the user community. This combination of transaction-level modeling and SystemVerilog's verification capabilities enables a powerful, complete System-to-RTL verification methodology based on open, industry standard languages."

For a direct quote and further information contact:

Farhad Hayat
Vice President of Marketing
Phone: +1 650.584.4347

OSCI Associate Corporate Members

Atrenta, Inc.
"TLM will be the catalyst for Electronic Systems Design growth," said Martin Baynes, product director for the Systems and Software Business Unit at Atrenta. "RTL synthesis specifies limited implementations from HDLs, so it enables RTL design methods. TLM specifies functionality without dictating implementation. So TLM upgrades SystemC from semi-structured simulation to specification modeling, enabling Electronic System Design."

For a direct quote and further information contact:

Martin Baynes
Product Director
Direct: +1.408 467 .4224

Calypto Design Systems
"The IC design industry's move to higher level design and modeling is inevitable. As an active contributor to the OSCI standards efforts, we strongly believe that usable industry standards -- such as the SystemC Transaction-level Modeling Standard -- are key enablers for design teams to realize the productivity of moving higher in the System-to-RTL Continuum."

- Michael Sanie, vice president of marketing and business development at Calypto

For a direct quote and further information contact:

Elena Militar
Marketing Communications Manager
Phone: +1.408.850.2300

Celoxica Ltd.
"Raising the level of design abstraction through SystemC clearly improves SoC design and verification productivity, and the release of the OSCI TLM standard is a milestone in the growing maturity of ESL, said Jeff Jussel, US general manager and vice president worldwide marketing for Celoxica, an OSCI Associate Member Company. "The next step is to drive SystemC models to hardware implementation, and we are addressing this challenge through the continued deployment of the Agility Compiler for SystemC synthesis to generate RTL descriptions and SoC prototypes that help turn software models into silicon."

For a direct quote and further information contact:

Jeff Jussel
US General Manager and Vice President Worldwide Marketing
Phone: +1.512.744.0004

ChipVision Design Systems AG
"The OSCI TLM Kit represents a significant step towards enabling designers to move beyond the signal-level to transaction-level design and verification. It will allow associate members like ChipVision to enhance its pre-RTL low-power optimization solution ORINOCO DALE with power analysis based on standardized transaction-level modeling."

For a direct quote and further information contact:

Frank Schirrmeister
Vice President Business Development
Phone: +1.408-983.1260

"ESLX has seen a significant upsurge in the interest for transaction-level modeling and SystemC training at both IC design and systems houses," said Jack Donovan, president of ESLX, a company specializing in SystemC and Electronic System-Level Methodology adoption. "We believe the TLM standard will accelerate the rapid adoption of SystemC and the associated ESL methodologies."

For a direct quote and further information contact:

Jack Donovan
Phone: +1.512.431.7630

Summit Design, Inc.
"Software development and system validation need to begin before a hardware prototype is available. Using TLM it is possible to create a model that is accurate enough for this purpose long before the hardware design is complete," said Emil Gircycz, president and CEO at Summit Design, an OSCI Associate Corporate member company. "The OSCI TLM standard will make it possible to build TLM models that can be used throughout the industry. Interoperability will promote the availability of high-level models, which is key for effective ESL."

For a direct quote and further information contact:

Francine Bacchini
PR Representative
Phone: +1.408.839.8153

Synfora, Inc.
"As a leading proponent of high level design, Synfora is actively involved in System C as a verification and validation tool," said Raj Singh vice president of Sales & Marketing at Synfora Inc. "By providing SystemC output wrappers at each stage of the design, we enable the designer to model and verify the complete system within the TLM framework."

For a direct quote and further information contact:

Raj Singh
Vice President of Worldwide Sales & Marketing
Phone: +1.650.314.0500 x120

Industry Organization

"OCP-IP has shipped thousands of copies of OCP transaction-level models in SystemC since 2002, and we believe the methodology has been proven highly successful. We have worked closely with OSCI to ensure compatibility of OCP and OSCI transaction standards, providing our users seamless interoperability."

- Ian Mackintosh, president OCP-IP

For a direct quote for further information contact:

Joe Basques
PR Representative
Phone: +1.650.366.8212

For more information, please contact:

Jill Jacobs
ThinkBold Corporate Communications, LLC