Mentor Graphics Questa Vanguard Program Drives Expansion of SystemVerilog Ecosystem
Third-Party Verification IP Qualified with Questa
WILSONVILLE, Ore., May 8, 2006 - Mentor Graphics Corporation (Nasdaq: MENT) today announced the Questa™ Vanguard Program (QVP), a partnership with industry-leading companies to enhance the verification options for Questa users and build a strong and comprehensive SystemVerilog ecosystem.
The Questa Vanguard Program extends Mentor Graphics breadth of verification technologies through partnerships with other industry-leading companies that provide verification related tools and methods, verification IP, conversion services, training and consulting. Through these technology alliances and strategic partnerships, Mentor Graphics leverages resources and technical expertise to deliver even greater value to Questa users, including strong product integration with other Mentor Graphics technologies (see news release "Mentor Graphics Delivers the Next Generation of Functional Verification," May 8, 2006).
"Without adequate industry infrastructure, no new technologies or methodologies can be successful," said Dennis Brophy, director of strategic business development at Mentor Graphics. "Mentor Graphics is committed to work closely with partners to ensure full support of the Questa platform."
With the Questa Vanguard Program, Mentor has joined forces with leaders (see list of vendors enclosed) in training, consulting, conversion services and verification intellectual property (IP) to simplify and accelerate the adoption of new verification languages and techniques. Each partner works closely with Mentor to ensure that their products support the Questa platform and the Advanced Verification Methodology (AVM). In particular, Mentor has worked with select partners to facilitate the availability of their conversion products and services to help users rapidly migrate from proprietary single-vendor languages to SystemVerilog and the AVM.
QVP enables design and verification engineers to meet today's verification challenges by extending and augmenting the Questa solution via Mentor's partnerships, thus allowing customers to identify the right partner for their verification needs. With a strong balance of QVP partners that support a broad set of verification IP, Mentor Graphics leverages the verification IP qualified for use with the Questa platform to deliver greater value to Mentor customers. QVP partners support more than 30 protocols with over 50 verification IP elements.
Membership in the Questa Vanguard Program is open to those companies who work with Mentor Graphics verification customers and wish to promote the development and use of EDA tools, verification IP, training services and verification methodology consulting that support the SystemVerilog standard for design and verification. QVP members gain access to the Questa platform to ensure design and verification data interoperability and to provide support for mutual customers. In addition, Questa has been designed to work with Mentor's ModelSim® partner tool integrations, design libraries, and others services which represent more than 500 products and services from over 100 companies. For information on how to join the program, visit www.mentor.com/questa or send an email to email@example.com.
Questa Vanguard Program Partner Statements
"We are pleased to be part of Mentor's Questa Vanguard Program. This collaboration is a very effective step toward providing customers with powerful and tightly integrated design and verification flows."
Dr. Ramin Hojati, president of Averant, Inc.
"Doulos has partnered with Mentor for the benefit of our mutual customers over many years, and we are pleased to be engaged further in the Vanguard initiative. Embedding the 'know-how' necessary for effective verification within our customer base is what Doulos excels at; Vanguard will enable us to do that more effectively for Questa users."
Rob Hurley, Managing Director, Doulos
Denali Software, Inc.
"Mentor Graphics is demonstrating its leadership in SystemVerilog solutions with Questa. Using Questa's native implementation of SystemVerilog, we were able to deploy a very sophisticated coverage-driven, constrained-random verification environment that fully utilized the advanced features of Denali's verification IP products. This is key to enabling shorter development cycles, and higher quality results. Questa takes full advantage of SystemVerilog by providing a single kernel verification solution that offers significant performance and debugging advantages over the previous generation of multi-tool, multi-language solutions."
Brian Gardner, vice president of IP products at Denali.
"Questa provides an integrated development environment, which enables engineers to work with assertions, coverage and edit code, view waveforms all in a single window, resulting in reduced time-to-debug."
Nilesh Ranpura, Sr. Engineering Manager at eInfochips.
Europe Technologies SA
"Europe-Technologies (ET) decided to use Questa and SystemVerilog for all the IP verification. Questa responded to ET's needs: using Mentor Graphic's AVM (Advanced Verification Methodology), ET was able to develop new verification libraries by exploiting the powerful new standard SystemVerilog language."
Dennis Ramaekers, Europe Technologies
"ExpertIO, the industry leader in Verification IP for multi-gigabit storage and networking protocols, fully supports the Questa tool platform. As a supplier of natively compiled Verilog / SystemVerilog SVCs (System Verification Components), our solutions offer the most performance from Questa for more verification cycles. For more information about ExpertIO's SATA, SAS, FiberChannel, and XAUI SVCs, please visit www.expertio.com"
Craig Stoops, President - ExpertIO, Inc.
HDL Design House
"HDL Design House joined the Questa Vanguard Program a year ago. We saw a tremendous boost in our SystemVerilog based Verification IP product quality. The development cycle for our Verification IP shortened beyond our expectation. Our prospects and customers responded positively to our newly introduced SystemVerilog VIP, which is compliant to the AVM. The Mentor Graphics QVP team fully understood and addressed our needs accurately, enabling us to accelerate our implementation schedule for our products."
Bogdan Bizic, SV Verification Product Manager, HDL Design House
hd Lab, Inc.
"hd Lab is honored to be a member of the Questa Vanguard Program. We are able to provide to all Japanese design and verification engineers comprehensive SystemVerilog training classes based on the Questa as a best in class SystemVerilog & SystemC verification environment."
Mr. Hasegawa, Founder and President of hd Lab
nSys Design Systems Pvt. Ltd
"SystemVerilog is a very important standard for system-level verification and gaining wide acceptance rapidly as users have an alternative to proprietary languages or solutions. nSys is committed to support its nVS family of Verification IP on SystemVerilog and we appreciate Mentor's effort to support SystemVerilog by providing a complete standards-based verification environment with Questa."
Atul Bhatia, Director of nSys, Inc.
Paradigm Works, Inc.
"Paradigm Works is engaged with helping a growing number of companies that are in the process of adopting SystemVerilog as the language of choice for designing and verifying complex ASICS, FPGAs, Design IP, and Verification IP. For the long term success of these projects, vendor support for the IEEE 1800-2005 standard and the adoption of advanced verification and design methodologies are critical requirements. We believe that with the release of Questa 6.2, and its support for AVM and TLM methodologies, Mentor has taken these requirements very seriously."
Dr. Ambar Sarkar, Principal Consulting Engr, Paradigm Works
Real Intent, Inc.
"As the leading supplier of Formal Analysis solutions, Real Intent is very pleased to work with the Questa team. Mentor is to be praised for rapid adoption of System Verilog and we are ensuring compatibility between Verix and Questa. Our Clock Intent Verification - SimPortal application directly leverages Questa, and we are actively working to deliver superior solutions to our joint customers."
Prakash Narain, President & CEO, Real Intent
"The QVP program is as innovative as the product it seeks to enhance. Mentor has been very proactive in engaging its partners and provides an unusually high level of support to third party vendors during the integration phase. Mentor has a very clear and complete vision of what a System Level DVT platform should be and with Questa, QVP and AVM have gone a long way to delivering it. SpiraTech shares their vision and will ensure that our Transactors, BFMs and other Verification IP embrace the Advanced Verification Methodology and that they are seamlessly integrated with Questa."
Simon M. Calder, CEO SpiraTech Ltd
Sunburst Design Inc.
"Sunburst Design, long-time provider of world class SystemVerilog seminars and training using ModelSim and Questasim, looks forward to using Mentor's Questasim 6.2 simulator with enhanced SystemVerilog support in its advanced training classes.
Sunburst Design recognizes that life is too short for bad or boring training, and the latest release of Questasim will allow us to offer even greater lab experiences for engineers looking to adopt SystemVerilog design and verification skills and methodologies from training materials developed by renowned Verilog & SystemVerilog expert, Cliff Cummings.
Sunburst Design also congratulates Mentor for releasing a freely downloadable Advanced Verification Methodology manual with coded examples to assist engineers in the implementation of new and advanced SystemVerilog verification environments."
Cliff Cummings - President, Sunburst Design, Inc.
World Class Verilog & SystemVerilog Training
Sutherland HDL, Inc.
"Sutherland HDL, a leader in advanced SystemVerilog training, has been pleased to use Questa in our training workshops, and to be an evaluator of Questa 6.2 and AVM. Questa provides our students with the capabilities needed as they learn to take full advantage of power of SystemVerilog for design and verification. The Questa graphical user interface is easy to learn and provides the insight needed to understand and use SystemVerilog assertions, coverage, and constrained random test generation."
Stuart Sutherland, President, Sutherland HDL, Inc.
VeriEZ Solutions, Inc.
"VeriEZ is strongly committed to supporting technologies that enable wide-spread adoption of the SystemVerilog language. The Advanced Verification Methodology (AVM) is sure to add tremendous value to verification flows, and we would like to commend Mentor for such a timely offering. As a member of the Questa Vanguard Program, we look forward to integrating VeriEZ's SystemVerilog solutions with AVM."
Sashi Obilisetty, President & CEO, VeriEZ
"Vericine is very happy to join Questa Vanguard Program. As in the past Mentor Graphics has proved to be very helpful. Vericine provides best in class verification solutions for its customers and working with Mentor's pure SystemVerilog solutions helps us to achieve this goal."
Ronen Hadar, Principal Consultant & General Manager, Vericine
"The Questa Vanguard Program brings together powerful verification tool and platform technologies, an effective verification methodology, and a network of expert consulting partners that will help lift verification teams to higher degrees of effectiveness.
Questa itself is a practical and powerful integrated solution for developing state-of-the-art verification environments utilizing both SystemVerilog Assertions and SystemVerilog Testbench language constructs. Questa 6.2 in particular promises to bring language support, capability and simulation performance to even higher levels.
The Mentor AVM in turn represents a significant open-source contribution to the verification community. It enables effective and efficient SystemVerilog and SystemC verification environments to be developed by engineers with different levels of expertise, through clear documentation and executable example code presented in a lightweight and practical cookbook format."
Mark Litterick, Co-Founder, Verilab
"SystemVerilog, as an open standard HVL, is an ideal language to develop modern coverage-driven, constrained-random assertion-based verification environments. Mentor's Questa 6.2 simulator implements all of the key features of the language and enables verification engineers to achieve the full potential of the standard. We are pleased to be a partner in the Questa Vanguard Program."
Dr Paul Marriott, Director of Verification, XtremeEDA Corporation
Willamette HDL, Inc
"We've been working with Mentor Graphics for the last several months to train its customers and applications engineers on the Advanced Verification Methodology using the new release of Questa. We've helped debug the software by providing a communications channel for its customers to offer feedback. As verification training specialists, we've been impressed with this new version of Questa and wholeheartedly support Mentor Graphics' efforts to further SystemVerilog adoption and this verification methodology."
Mike Baird, President, Willamette HDL, Portland, Ore.
About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of over $700 million and employs approximately 4,000 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.
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Mentor Graphics and ModelSim are registered trademarks and Questa is a trademark of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.
Questa™ Vanguard Program (QVP) Members
1. Ace Verification Corp.
2. ARM, Ltd.
3. Averant Inc.
4. Doulos Ltd.
5. Denali Software, Inc.
6. eInfoChips Ltd
7. Europe Technologies SA
8. Expert I/O
9. HDL Design House
10. hd Lab, Inc.
11. MU Electronics SARL
12. NoBug Inc.
13. nSys Design Systems Pvt. Ltd
14. PSI Electronics SARL
15. Paradigm Works, Inc.
16. Real Intent, Inc.
17. SiManits Inc.
18. SpiraTech Ltd.
19. Sunburst Design Inc.
20. Sutherland HDL, Inc.
22. VeriEZ Solutions, Inc.
23. Vericine Ltd.
24. Verilab, Inc.
25. Vhdl Cohen Publishing
26. Willamette HDL, Inc
27. XtremeEDA Corporation