Cadence Design Systems, Inc.

Verilog Top-Down Design Solutions

HDL Simulation, Cycle Simulation and Fault Simulation

Product Description

VERILOG-XL
Verilog-XL combines the power of a high performance simulation tool with the flexibility of an interactive design environment. It can be used throughout the design flow, from initial code exploration, through high-speed functional testing, to final validation of the design. It comes complete with the SimVision Graphical User Interface. Verilog-XL also offers the industry's fastest mixed-language solution with the VHDL Model Import option.

NC-VERILOG
The foundation of the NC-Verilog architecture is true native compiled code technology, which maximizes performance by optimizing the concurrent nature of the Verilog language directly on to the machine architecture. This has constantly produced benchmark results that exceed any other commercial simulator available. The native compiled code architecture also reduces common simulation bottlenecks such as compilation, SDF annotation, PLI interaction and text/waveform data output.

LEAPFROG
Leapfrog is The VHDL Simulation productivity and performance leader. It supports the VITAL standard for gate level simulation as well as architectural abstraction for system design. The Verilog Model Import option gives VHDL designers access to mixed-language simulation with the industry standard Verilog-XL.

VERIFAULT-XL
Verifault is a concurrent fault simulator built on the industry standard Verilog-XL technology. It's accuracy has been proven in the industry with thousands of successful designs. Verifault uses full timing in the simulation and supports SDF back-annotation. It will propagate faults through Verilog RTL code. It supports PLI and has sign-off status at most ASIC vendors.

COBRA
The Cobra™ Cycle Simulator is the high performance cycle simulator based on the MDD technology developed at Cadence Berkeley Labs. Cobra utilizes the NC-Verilog compiler and SimVision debug environment to deliver the only design flow to support high performance event through cycle verification. Cobra provides 3 to 10 times the performance of the fastest compiled Verilog simulator, NC-Verilog.

As INCA technology, Cobra works with NC-Verilog to provide cycle-event coexecution with zero interface overhead. This eliminates a major barrier to the acceptance of cycle simulation by providing a no-compromise solution for non-cycle compliant legacy code and IP. INCA cycle-event coexecution also provides the best performance for the verification of synthesis-ready designs and their complex testbenches.

Benefits to End User of Product and Interface to MGC
Mentor Graphics Design For Test (DFT) tools coupled with the Verilog logic design and verification tools provide:

• Reduced time to market with fast turnaround time
• Ability to explore different DFT strategies and create testable circuits
• Ability to analyze functionality, timing and testability of your circuits early in the design cycle

Company Background
Cadence Design Systems, Inc. provides comprehensive services and technology for the product development requirements of the world's leading electronics companies. Cadence is the largest supplier of software tools and professional services used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronic-based products. With more than 4,000 employees and annual sales of $916 million in 1997, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif. and traded on the New York Stock Exchange under the symbol CDN.

Description of Integration
DFTAdvisor, FastScan, and FlexTest support HDL netlists, vector and library formats.

Platforms Supported

SPECCTRA?
A family of ShapeBased™ Printed Circuit Board Automation Products

SPECCTRA is a registered trademark of Cadence or its wholly-owned subsidiary, Cooper & Chyan Technology, Inc., in the United States and numerous other countries.

Production Description
The SPECCTRA family of PCB automation products use a ShapeBased architecture to achieve superior routing and placement while adhering to all defined design rules. SPECCTRA supports a rich set of electrical design rules for high-speed circuit boards, including table driven crosstalk controls, differential pair routing, length controlled routing, clock tree & delay path control, and critical net shielding.

The SPECCTRA toolset include three base products: EditPlace, AutoRoute, and EditRoute. These base products can be purchased as stand alone or as part of an integrated package.

EditPlace provides users with the floorplanning tools needed to design rooms which meet all electrical and manufacturing constraints. For example, height constraints, split power areas, and power dissipation requirements can be addressed. In addition, analog, CPU memory, TTL and ECL circuitry can be separated or joined. After a floorplan is developed, EditPlace will automatically perform the detailed calculations to optimally place each component.

The AutoPlace option is designed to rapidly place boards while obeying complex design rules. AutoPlace is rules driven, and shares an extensive rule set with SPECCTRA AutoRoute. No matrix definition or lengthy setup for placing different sized components is required. Designers can quickly generate a placement to evaluate space, logic flow, and congestion before invoking the autorouter.

AutoRoute is an advanced technology autorouter designed to handle the special requirements of high density printed circuit boards with complex design rule requirements. AutoRoute uses powerful ShapeBased algorithms to position wires at minimum spacing. The results are high completion rates and optimum use of routing space.

AutoRoute meets your additional manufacturing and test requirements with the Design for Manufacturability (DFM) option. For example, manufacturing yields can be improved significantly by using a postrouting command that automatically increases the clearance on a space available basis. The user controls clearance and object types.

The Advanced Rules (ADV) option adds a rich set of rules that satisfy the requirements for control of more complex design parameters. This option gives the designer additional flexibility to control critical electrical design rules. For example, each layer can have unique wire width and clearance rules that AutoRoute obeys as part of the normal autorouting.

AutoRoute's Hybrid (HYB) option includes features that support blind and buried vias under SMD pads, and automatic wire bond generation. These features, along with SPECCTRA's powerful autorouting algorithms, combine to make the option an effective solution for the most demanding hybrid layouts.

With the FST option, AutoRoute's ability to obey the design rules of high speed circuits is unmatched by any other autorouter. Features such as table-driven crosstalk controls, differential pair routing, length controlled routing, clock tree & delay path control, and critical net shielding virtually eliminate manual layout time and effort, even for the toughest designs.

EditRoute is Cadence's wire and via editor. With EditRoute, the same powerful algorithms that drive the SPECCTRA autorouter are placed under the user's control. For example, a user can shove a control wire or via against other traces. The other traces will be plowed or pushed ahead of the control wire, and over other pins and vias. EditRoute also gives you the ability to switch instantly between GUI environments and automatic and interactive routing.

With the EditFST option, you can easily route nets to satisfy timing constraints, quickly route multiple nets as a single bus, and automatically route single nets.

Benefits to End User of Product and Interface to MGC

• Plug-in tools provide an immediate high-performance autorouter with little impact on end user methodologies
• Complete support for dense, double-sided fast circuit boards
• Automatic placement option places complex boards quickly, even with stringent manufacturing requirements. Set up for AutoPlace is easy and no matrix is required
• AutoRoute supports a full array of design rules such as trace width and clearance for: the entire PCB; each layer; classes of nets; an individual net; specific pin to pin connections; nets by layer; and area
• EditRoute provides powerful, grid-free editing capabilities

Description of Integration
SPECCTRA tools interface to Mentor Graphics Board Station through two translation programs. (1): "Mentor to SPECCTRA" creates a SPECCTRA design file by extracting data from an ASCII parts file, a component file, a nets file, a technology file, and optionally a preroutes file. (2): "SPECCTRA to Mentor" writes a traces and comps file in Board Station format after autorouting and/or autoplacement has been completed.

Platforms Supported

Distribution and Contact Information
SPECCTRA tools are available worldwide through OEM distributors and direct sales.

Cadence's software design automation products are available worldwide through a direct sales force supported by local applications engineers. Currently, Cadence has sales offices throughout North America, Europe and Asia.