Sequence Design, Inc.

Columbus™

Interconnect R, L, C Parasitic Extraction

Product Description
ExtractionStage is a new generation of extraction tools delivering unrivaled speed, accuracy, and capacity for designs below 180 nanometers (nm). With ExtractionStage, you can handle the complex process-modeling and electrical-modeling challenges facing designers today.

The stage is set for a new suite of interconnect parasitic tools extracting high accuracy resistance (R), capacitance (C), and inductance (L) values across a wide range of design styles.

• Columbus-Turbo for high-speed standard cell design
• Columbus-Gold for custom analog and digital design
• Columbus-SoC for chip-level hierachical design
• Columbus-RF for high-frequency RF design

The ExtractionStage products handle the widest range of requirements of any extraction product family on the market today. From one common process model, you can extract hierarchically down to transistor-level, select certain nets for maximum accuracy, look at bus-related inductances, or extract large standard-cell blocks at speeds 3 to 10 times faster than other extractors. The Columbus product suite reads design data in GDSII, LEF/DEF, or Apollo formats, and creates wire models in DSPF, SPEF, or SPICE formats. Each Columbus product family member is optimized for a particular design style, but they all share the same silicon process description file, and use the same patented extraction technology.

Benefits to End User of Product and Interface to MGC

• Accurate parasitics within 5% of measured silicon
• Extraction speeds of 1 Million nets per hour
• Industry's first Inductance (L) extractor
• Extract net-by-net at different frequencies
• Optimal selection of coupled or distributed parasitic models

Company Background
Sequence Design delivers advanced EDA solutions for the next generation of system-on-chip design, at 180 nanometers and below.

Sequence's products and services enable designers to bring higher-performance, lower-power integrated circuits quickly to tape out - giving customers the competitive advantage to excel in aggressive technology markets such as networking, wireless communications, and advanced ASIC design.

Description of Integration
Interface to Calibre:From physical verification output files from Calibre, designer will use interface programs developed by Sequence to intake Calibre cross-reference files as well as the spice net-list file in order that Columbus can trace the nets and understand the device port locations. The programs will generate a design netlist in Columbus format (NIF) and will generate other input files necessary to run Columbus.

Interface to Xcalibre: From extraction output using xCalibre, designers will be able to invoke Columbus which will interface with the Xcalibre database and read the design data necessary to enhance accuracy of critical nets by using Columbus. If users would like to augment their R,C parasitics with Inductance parasitics, they may invoke Columbus to use this same interface to the Xcalibre database and extract Inductance parasitics.

Platforms Supported

Distribution and Contact Information