IC Package Design Optimization and Analysis for USB 3.0

Overview

This Webinar introduces important IC Package Design considerations, including an effective high-speed design methodology that has been successfully employed for the design of a commercial USB 3.0 package. USB 3.0 is rapidly being adopted by a growing number of system level companies, spawning many integrated device manufacturers (IDMs) to develop new chips to address this need. USB 3.0 supports data transfer rates up to 4.2 Gbits/sec, creating new challenges in the high-speed SERDES design process for the IC package designer and signal integrity engineer. These higher data rates will require substantially improved modeling accuracy of the IC Package Design interconnect, wire bonds, vias and solder balls. Full 3D electromagnetic (EM) simulation and modeling is required for such structures, to help ensure the package design is optimized for low cross-talk (EM coupling), reflection, and insertion loss.

What You Will Learn

• PCI  Express (PCIe) Gen 2/3 performance requirements related to USB 3.0 and IC package design
• USB PCB design techniques to overcome design challenges
• How to correct typical mistakes and oversights made by inexperienced IC package designers
• How to use IE3D to model packages.

Who Should View

• IC Package Designers
• Signal Integrity Engineers
• Design Managers
• Engineering Managers