There are a number of heterogeneous multicore SoCs being introduced including the Vybrid platform from Freescale and the Jacinto 6 platform from Texas Instruments. At CES in January 2014 we demonstrated how the communication between Cortex M4 and Cortex A15 cores on the TI Jacinto 6 can be implemented using rpmsg. The two videos below show this demonstration in action.
The first video illustrates how information from a CAN simulator can be efficiently processed on the Cortex M4 cores using AUTOSAR and integrated into Linux based Instrument Cluster and Infotainment applications running on Cortex A15 cores with a simple ambient light scenario.
The second video shows how the data being transferred between the M4 and A15 cores can be visually analyzed with the Mentor Embedded Sourcery Analyzer.