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Monitoring Inter-Process Communication Between Cortex M4 and Cortex A15 on Texas Instruments Jacinto 6 Heterogeneous Multicore SoC

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Description

The rpmsg framework is used in this demonstration to transfer data between the Cortex™ M4 and Cortex™ A15 cores on the TI Jacinto 6 platform. The M4 cores are executing an AUTOSAR application and interfacing with a CAN simulator. The data is processed on the M4 cores and transferred to the A15 cores running Linux based Instrument Cluster and IVI applications. This demonstration shows how the data being transferred between the M4 and A15 cores can be visually analyzed with the Mentor Embedded Sourcery Analyzer.

Details

Design Areas Embedded Software
Products Hypervisor
 
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