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Sourcery Probe

Designed specifically to simplify target board bring-up and debug

The Mentor Embedded Sourcery Probe provides a robust target debug connection, supporting a wide range of ARM, MIPS, and Power Architecture processors.

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The Mentor Embedded Sourcery Probe is tightly integrated with Sourcery CodeBench which allowing developers to save time during board bring-up and application debugging.

Mentor® Embedded Sourcery Probes have evolved over the years toward one single goal: To enable bare-metal bring-up of new target platforms quickly and easily with the best technology possible, and with the greatest degree of confidence.

The Mentor Embedded Sourcery Probe is tightly integrated with Sourcery CodeBench allowing developers to save time during board bring-up and application debugging. The probe also provides visibility into and control of ARM, MIPS, and Power Architecture cores on-chip debug features.

The high end Mentor Embedded Sourcery Probe Professional is available with several Sourcery Probe connectors so that a single probe can support multiple processors, architectures, and software environment right out of the box.

Contact Embedded

High-performance Real Time Trace Based Debugging

Non-intrusive software insight for ARM cores with the high-speed, high-capacity Ashling Vitra-XD trace probe. Learn more

How-To Guide

How-To Guide: Using Mentor Embedded Sourcery Probe to Program Flash Devices

View our step-by-step guide to getting, setting up, and using the flash programming utility to program flash memory on your target system using Sourcery Probe.

Architecture Support

Sourcery Probes support leading embedded architectures, including:

  • ARM
  • MIPS
  • Power

Learn more

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Mentor® Embedded Sourcery Probe facilitates board bring-up, platform development, and fast software download.

Features and Benefits

Easy transition from processor reference designs to OEM board designs

Mentor’s Sourcery Probe is integrated with the Mentor Embedded Sourcery CodeBench environment which provides support for several targets out of the box. Using these targets and provided templates, users can transition from reference board design to OEM board designs seamlessly.

Comprehensive cache and MMU/MPU support

This is defined by each core type, including all write-through and/or write back cache mode options, memory management or protection modes, and DMA where supported by the core.

Supports the industry’s leading cores and board designs

Mentor probes support ARM, MIPS, and Power Architecture cores.Mentor probes also provide out-of-the-box support for several Power Architecture Architecture targets and board designs from ARM and MIPS licensees.

Software debug capabilities

  • Instruction execution control
  • Display and modify target memory
  • Examine and modify processor registers
  • Run-control visibility and control
  • Breakpoint control in ROM, RAM, or Flash memory
  • Single-step through source and assembly
  • Single-step into, over, or out of functions

Requirements

  • The Mentor Embedded Sourcery Probe requires Sourcery CodeBench.

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Mentor® Embedded Sourcery Probe Professional

Sourcery Probe Professional

Highlights

  • Supports ARM, MIPS, and Power Architecture processors
  • Supports all CPU core speeds
  • Provides control and debug software running in-target, with minimal intrusion into target system operation
  • Debug code in cache, ROM, RAM, and Flash memory

Peformance

  • Split-second, single-step execution
  • Sourcery Probe Professional is capable of download speeds greater than 1 MB per second from host to the target
  • Supports 10/100/1000BaseT Ethernet network connection
  • Supports telnet access to your target system’s serial port, allowing you to interact with your target system’s serial port over the network
  • Supports both big and little endian byte-order
  • Automatically supports target system signal levels from 1.2V to 3.3V

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Mentor® Embedded Sourcery Probe Personal

Sourcery Probe Personal

Highlights

  • Supports ARM, MIPS, and Power Architecture processors
  • Supports Windows and Linux® hosts
  • Supports all CPU core speeds
  • Provides control and debug software running in-target, with minimal intrusion into target operation
  • Allows debug code in cache, ROM, RAM, and Flash memory

Performance

  • Split-second, single-step execution
  • Capable of download speeds greater than 12 MB per minute from host to target
  • Supports USB 2.0
  • Supports both big and little endian byte-order
  • Automatically supports target signal levels from 1.8V to 3.3V

 
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