A Designer’s Perspective on ESL Methodologies for an OFDM Modem Design

“In recent times, ESL design methodologies have been the talk of the semiconductor design community and have found increasing acceptance. Most of the recent publications have given information on design flow needs and an high level overview of the (C/C++/SystemC) based high level synthesis design process using a small block level design scenario. Although productivity benefits for ESL methodologies have been acknowledged, there is still little information regarding the scalability, quality of results (QoR), and learning curve of deploying these ESL design methodologies on real and large scale industrial designs.”

This quote is taken from a very thorough DesignCon 2011 paper, in which authors Harvinder Singh, Gagan Midha, Thierry Michel, Roberto Guizzetti, Pascal Urard, Nitin Chawla of STMicroelectronics provide an indepth description of their experience in designing a complete OFDM modem with an ESL methodology.
 
What is really interesting about this paper is that it presents the methodology from a designer’s perpective. The design process is explained in context of a high throughput and multi-million gate complexity OFDM modem design. The complete modem has been designed using High Level Synthesis. First the design partitioning process for breaking down the OFDM modem into sub-blocks is explained, along with details on the basic architecture of the modem. The HLS process of block development and the integration of blocks (data and control flow) is illustrated with special focus on challenges and solutions during the design cycle. The block architecture of the major building blocks of an OFDM system, such as Forward Error Correction (FEC) decoders and Fast Fourier Transform (FFT) is discussed and QoR results are presented, demonstrating the advantage of using HLS for design space exploration.

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The complete paper can be downloaded here. I highly recommended reading it.

OFDM inter-block interfaces and data flow control

OFDM inter-block interfaces and data flow control

About Thomas Bollaert

imageMy first encounter with HLS, back then behavioural synthesis, dates more than 15 years. Since then my ventures have led me to explore many aspects of the ESL design flow, including HW/SW co-design, architecture exploration and of course, C synthesis. Five years ago, I joined Mentor to develop the Catapult C product line in Europe. Recently, my little family followed me all the way from Paris to Oregon, where I now serve as product marketing manager for Mentor Graphics' high-level synthesis product line. Visit Thomas Bollaert’s Blog

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