DesignCon 2010 Paper Award Winners

DesignCon is a major event for EEs working on leading edge hardware design and semiconductor activities. The event takes place annually in the Silicon Valley and it’s never a waste of time to attend it. After each conference, the organizing International Engineering Consortium (IEC) designates DesignCon Paper Award Winners. And it’s quite insightful to see which papers and which kind of topics receive this special recognition.

This year, in the Chip-Level Design category, the two recipients of the award are: 

• Andres Takach, Chief Scientist at Mentor Graphics: Creating C++ IP for High Performance Hardware Implementations of FFTs
• Luke Teyssier, Senior Staff Engineer at Cryptography Research: Strong Encryption and Correct Design Are Not Enough: Protecting Your Secure System from Side Channel Attacks

Before going any further in this blog post, let me get something off the table here: yes, Andres is a close colleague and friend. And no, the purpose of this post is not to “toot our horn”. This paper is really well written and a very interesting document for anyone serious about high-level synthesis and looking for detailed consideration on coding style and best practices.  HLS is not a magic process automatically producing great designs from random C++ code. And this thorough, 25-pages long, document is an excellent example of the thought process and all the steps that an engineer goes through when creating a design using an HLS approach. 

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Beyond this detailed “how-to” aspect, the really interesting twist in this piece is how the high-level model is written with flexibility and genericity in mind. Joseph Fourier’s formula is pretty simple, but the possible hardware implementations are almost infinite. Decimation in time or in frequency, radix 2, 4 or 8 butterflies, streaming or in-place: designers don’t lack architectural options to implement the famous transform. 

The C++ language offers extremely powerful constructs such as classes and templates. These allow the creation of highly generic designs. If you think that VHDL “generate” statements are powerful, then the power and potential of C++ for that matter will blow you away. 

To cut a long story short, this paper is really worthwhile reading if you are following this blog…

On a closing note, it is also quite interesting to note that it is the second year in a row that a DesignCon award goes to an HLS-related paper. Last year, STMicroelectronics clinched the prize with another very good paper on Design Space Exploration for High Performance Signal Processing Hardware using ESL Design Methodologies.

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