Dropping RTL for C++, from Finland to India
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Posted Jun 8, 2010
by Thomas Bollaert
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What is a Go URL?Whether seen as a necessity to tackle design complexity or an opportunity to improve productivity, high-level synthesis has been one of hottest EDA topics in the past couple of years. In this blog, I have been trying to provide, amongst others, regular updates on customer case studies - for instance here, here or here.
In the past couple of weeks, two new and really interesting contributions were added to an already long list… And what’s really nice is to see that these two stories come from very different areas of the world. If there was still any doubt, HLS has clearly entered the mainstream of hardware design.
- Video processing
The first story comes from India. In FPGA Journal, Kumar Chatterjee and Rashmi P. Kulkarni of Tata Elxsi explain how they have implemented a Virtual Line Crossing Detection (VLCD) system. VLCD is one of the video analytics algorithms used in video surveillance applications. It detects and tracks animate and inanimate objects introduced into a predefined boundary. Their algorithm si quite comprehensive and a wide range of features including: recognition and display of peripheral infringement, adaptive background modeling, efficient foreground extraction, object separation and video frame sampling ratio of 4:4:4.
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Wireless modem
The second story comes from Finland. Johanna Ketonen has been using Catapult C for the past 3 years and in this ESNUG piece she provides thorough details on her experience with the tool to design wireless systems for 3G and LTE. In her testimonial, Johanna compares the Catapult C results against hand-coded implementation, discusses the HLS input language and explains how she was able to create complex hierarchical design with this approach. Using C++ for hardware design, not only she was able to get RTL code faster, but she was also able to reduce the verification effort by a factor of 6!
Preparing RecommendationsHigh-level synthesis is now being picked-up world wide. If you are interested to hear more about HLS and happen to be in Anaheim next week for the 47th DAC, feel free to register for a private suite session in the Mentor booth.
About Thomas Bollaert
My first encounter with HLS, back then behavioural synthesis, dates more than 15 years. Since then my ventures have led me to explore many aspects of the ESL design flow, including HW/SW co-design, architecture exploration and of course, C synthesis. Five years ago, I joined Mentor to develop the Catapult C product line in Europe. Recently, my little family followed me all the way from Paris to Oregon, where I now serve as product marketing manager for Mentor Graphics' high-level synthesis product line.
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