One of the best EDA releases of 2009
Blog Post
Posted Dec 2, 2009
by Thomas Bollaert
Follow on Twitter
Go URL
What is a Go URL?In a very thorough article published yesterday, Electronic Design’s David Maliniak takes a close look at ESL tools and how they are taking center stage as designers move up the abstraction ladder. The article reviews the details of the two major additions in the latest release of Catapult C: low-power optimizations and control-logic synthesis.
“Launched in 2004, Mentor Graphics’ Catapult C has seen continual improvement. Mentor has now fully endowed Catapult C with the ability to synthesize control-logic blocks, enabling it to synthesize full chips from ANSI C++ to RTL. It’s also one of the best EDA releases of 2009.”The full paper can be read here.
Resonating with Dave Maliniak’s article, Tim Köppe of Nokia-Siemens-Networks (NSN) gave a presentation at the U2U conference in Munich on how he was able to implement a control-logic design doing memory handling for packet buffers using the latest capabilities of Catapult C. The full presentation is available the U2U website.

Nokia Siemens Network - A Networking Example with Catapult C
The presentation provides extensive details on how the desired high-throughput for this networking application could be met with a combination of code improvements and synthesis constraints.
Preparing RecommendationsMore Blog Posts
Preparing RecommendationsRecent Posts
- Mentor ESL in TSMC Reference Flow 12
- 48th DAC - Gary’s Magic Formula
- DAC: 9th ESL Symposium
- HLS Fundamentals / Part 2
- HLS Fundamentals: Loop Unrolling and Loop Pipelining
- HLS Contest: And the winner is...
- A Designer’s Perspective on ESL Methodologies for an OFDM Modem Design
- Catapult C and the 7 Samuraïs
- The Why, What and How of HLS @ DATE 2011
- DVCon: Wally Rhine's Keynote
Comments
No one has commented yet on this post. Be the first to comment below.
Add Your Comment
Please complete the following information to comment or sign in.