The rest of my family need mobile devices that can charge themselves!

Why does everyone in my family except me have such a problem remembering to charge their mobile devices? I religiously plug my Blackberry into the charger every night when I go to bed. But the rest of my family are always complaining their phones, iPods etc. have no power just when they want to go out.

My wife is especially the worst culprit. Even though the charger remains permanently on in our kitchen and she usually leaves her mobile next to it, she always forgets the critical step of actually plugging the charge lead into the mobile! Also her mobile has a very annoying feature of emitting a loud squawk when the battery is low. This isn’t too much of a problem when it is in the kitchen but it is big problem if she leaves it in the bedroom and it starts squawking at 4am!

What my family really need are mobile devices that charge themselves, ideally by extracting energy from the environment around them.

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I was interested to hear a number of people ask questions about Energy Harvesting after the talk given by Mentor’s low power expert, Dr Barry Pangrle, on Power Efficient Design Challenges and Trends a couple of weeks back. If you missed it, I think it is worth checking the archive version - go to http://www.mentor.com/events/tech-talk/. Energy Harvesting is a pet topic of mine. I’m part of an Advisory Board for an ESPRC funded project “Next generation energy-harvesting electronic systems-Holistic approach”, www.holistic.ecs.soton.ac.uk.

Evidently one of the key issues in Energy Harvesting is to maximise energy transfer in highly non linear systems. Dr Tom J Kazmierski and his team at the University of Southampton are researching automated VHDL-AMS modelling techniques to solve this problem area using Mentor Graphics ADMS Simulation tools. www.mentor.com/products/fv/advance_ms/

It surprises me that although many mobile devices contain electro mechanical mechanisms to make them vibrate, these mechanisms are not utilised to generate power and charge the batteries. I’d be very interested to hear if anyone has researched why this is? I expect it’s related to the problem of extracting a useful amount of energy from such an electro-mechanical device (i.e. the problem Dr Kazmierski team are looking at) combined with our current generation of devices still requiring a much larger amount of power than can be usefully extracted from their environment.

This raises the question of where the biggest opportunity for power savings is in today’s devices. Many studies show that the biggest opportunities are at the architectural system level and in many applications it is critical to consider the interaction of software and hardware to optimise the system design. So why is it that the most common analysis tool to investigate this critical problem area is an Excel spreadsheet?!

Which brings me on to the topic of the forthcoming Tuesday Tech Talk - “How to optimize power through transaction level analysis and high level synthesis” on February 16th. http://www.mentor.com/events/tech-talk/. So if you would like to learn how to eliminate the need for my family to actually charge their mobile devices and stop my wife’s mobile waking me up at 4am, please listen in.

About Steve Collis

imageMy first exposure to Electronic Design Tools was at GEC Telecommunications where I manually entered HILO netlists using a DEC vt100 connected to a VAX to simulate a gate array design which eventually became part of a System X telephone exchange. Even though this was tedious work I could see the huge advantages in modelling a design in the computer verses trying to breadboard it in the lab. I was then lucky enough to be able to get involved in the development of early IC physical design system using parameterised language descriptions to build layouts of standard cells. Later on when I worked at DEC, I was involved in the early wave of RTL design using early language based simulators and synthesis tools and worked on the development of an early VHDL simulator. This early exposure to RTL design brought me to Mentor Graphics where I was lucky enough to be involved the adoption of RTL based design techniques and the significant changes to Gate Array, Asic, SoC and FPGA design techniques that have taken place over the last 20 years or so. More recently I have held various consulting and management positions and today head up a team of product specialist concentrating on high level design and functional verification across Europe. Visit The Steve Collis Blog

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