Why Partnerships Matter

My colleague, Thomas Bollaert, wrote a nice blog entry just before DAC 2009, in which he mentions the tight integration Catapult C Synthesis has with power analysis and optimization tools such as Atrenta’s SpyGlass-Power and Sequence Design’s PowerTheater.    While corporate blogs will naturally tend to gravitate towards their own products, Thomas touched upon an excellent point about the importance of partnerships and why they matter.   In the interest of full disclosure,  I work with our large base of Catapult partners on a daily basis.

So why do partnerships matter ?  Well, in a nutshell, it’s all about the customer.  Our customers have spent years perfecting their design flow methodology.  I would argue that every single company has their own unique design flow that has been qualified over successful ASIC tapeouts, utilizing a proven list of tools from various EDA tool vendors.   Just because a new “more better” design methodology comes along doesn’t mean that the existing and proven tools are discarded.  Rather, the new design tool or methodology must find a way to fit into the existing flow.   This is where strong partnerships come into the picture.

In the EDA landscape, partnerships tend to have broad interpretations.  Perhaps it refers to a core engine embedded within another tool, or it can be an R&D collaboration with an academic institution to scope out new technologies or markets still in their infancy.   These are all very important partnerships and I will cover these in a future post, but for this article I will focus on partnerships between EDA tool vendors.

To begin, let’s go through the thought process of an engineer that is considering a new tool and design methodology.  Feel free to let me know if I’m off base or if I forgot anything.  Moving on to the list of questions that need to be answered:

  1. Does the tool being considered work and deliver on its promises ?
  2. Does it offer a significant benefit to my team ?
  3. How much training and ramp-up is required in order for my team to benefit from the tool ?
  4. Does the tool have a track record ?
  5. Does the tool fit into my existing design flow ?
  6. Does the tool vendor have the financial and support resources to help me successfully adopt the tool ?
  7. Can I convince my purchasing team ?

I’m sure the decision-making process is perhaps a lot more complicated than the enumeration listed above, but still, I think it captures at a high-level, the thought-process in an engineer’s mind.  Looking specifically at point #5, you will see that for any new tool to be considered, it must play nice with other tools.

For example, let’s consider the key gate-keepers between design and hardware - RTL Synthesis.  Each company has their preferred RTL synthesis tool, whether it be Design Compiler, RTL Compiler or Talus for ASIC designs, or tools like Precision for FPGAs.   For any new tool vying for a coveted position in the customer’s design flow, it must have a seamless flow with one of the above-mentioned RTL-synthesis tools.   Without support for an RTL synthesis tool, any new evaluation is a non-starter.  What about flexibility ?  What happens if engineering and purchasing considerations dictate a change in the RTL synthesis tool of choice ?  Does the new tool have the capability to seamlessly adapt to the new design strategy ?  In the case of Catapult, production-ready flow scripts are available for all of the above-mentioned synthesis tools.

Another key aspect of hardware design is verification.  Verification is by far the single biggest time issue for any design team.  Every team has their special verification methodology that they have perfected over the years, and not surprisingly, it is never enough.  Functional verification, formal verification, code linting, algorithmic verification, FPGA prototyping - the list goes on and on in terms of what lengths engineers will go through to verify a design before ASIC tapeout.  What mechanisms does the new tool under consideration have for verification ?  The Catapult team has invested much engineering effort to ensure a robust verification environment.  Starting off with functional verification, Catapult has tight integration with Modelsim, Questa, NCSim and VCS.  Prefer formal verification ? Calypto’s SLEC, Conformal or Formality is on tap.  Need to prototype a circuit on FPGA ?  Not a problem with Precision targeting Altera or Xilinx devices.   What about algorithmic verification to ensure the “correctness” of the fixed-point representation of the original floating-point model ?  This is where the industry-standard MATLAB or Simulink come in where one can compare the M-model against the synthesizable C++ implementation.  Linting ?  No problem with Atrenta SpyGlass.

And, of course, let’s not forget the current “hot” topic (no pun intended) of low power design.  Many companies have been designing for low-power for years, but with the recent explosion of battery-powered portable devices, power-aware design is now at the forefront of any new SoC design right from the start.   In addition to having power-optimization capabilities within its own synthesis engine, Catapult also works with power analysis and optimization leaders such as Sequence Design’s PowerTheater, Atrenta’s SpyGlass-Power and Magma’s BlastPower, allowing designers to select the most appropriate architecture in terms of performance, area and power.

Until the time comes when a tool that can “do it all”, and we will wait a long time for that to happen,  partnerships amongst EDA vendors are vital in order to deliver solutions to customers facing ever increasing design pressures, whether it be cost, time-to-market, feature-creep, power optimization, or any other stretch goal that they must face on a daily basis.  It is for this reason that Catapult has invested many resources to deliver a robust ecosystem to ensure that any new designers wanting to look at high-level synthesis can do so from the perspective and comfort of their own established design flow.  We’re not trying to reinvent the wheel here.  We’re just trying to improve it.  And to do that, we need to work closely with other domain experts to deliver a solution that we hope IC designers will find value.  No one company can do it all.  We need to work together - as partners.

About Dinesh Jain

imageWhen it comes to electronics, my experience pretty much covers the full spectrum, or at least I'd like to believe so. My background is in video (consumer/broadcast) and image-processing/machine-vision, starting with building turn-key systems, then going to board-level development and then to the IC, and now in EDA with the Catapult group. I've played many roles throughout the years, from development, to applications and customer support, then product manager, and finally sales and marketing. Throughout my career, I have been extremely fortunate to have worked with incredible engineering teams as well as with amazing customers all over the globe. Visit High-Level Synthesis Herd

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1 Comment on this Post

Commented on 11:48 PM, Nov 8, 2009
By Herb Reiter

Dinesh, very insightful article. Please hold this principles up! Herb Reiter, 20+ years of Partnerships & Alliances Management

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