Blog

SystemC and UVM, one step closer

Posted Feb 28, 2011, by Thomas Bollaert

This morning Intel’s Eric Lish, OSCI chair, kicked-off the North American SystemC User Group collocated at DVCon. In his presentation, Eric covered the evolution of SystemC as well as recent and upcoming milestones. It is quite remarkable to see how much effort went into developing the language and the progress made since its debuts, 12 years ago. 12 years may seem like a very long time, but … Read More

Tags: SystemVerilog, TSMC, SystemC, UVM

ESL Agenda

Posted Feb 18, 2011, by Thomas Bollaert

Oh my, what a busy ESL agenda! There is content for everyone, everywhere. Here is a list of no less than 7 compelling events. Virtual Prototyping, ESL Verification, High-Level Synthesis: make your choice. What’s on your agenda? Which events will you be attending? SystemC Day 2011 - February 28th, San Jose, CA High-Level Synthesis Walks the Talk: Synthesizing a Complete Graphics Processing Application - … Read More

Tags: User Testimonial, EDA Tech Forum, High-Level Synthesis

7 Steps to Higher Productivity

Posted Jan 21, 2011, by Thomas Bollaert

In a recently published white paper, authors Bruno Thery, Serge Mazer, Adrian Beames and Yvan Desmartin of STMicroelectronics describe their seven steps approach to achieve higher productivity using High-Level Synthesis (HLS) and how this was key to help them deliver working silicon in time for the Las Vegas CES in January 2010. The white paper provides a detailed, step by step, description of how … Read More

Tags: User Testimonial, High-Level Synthesis

Your Chance to Beat John Cooley!

Posted Dec 16, 2010, by Thomas Bollaert

In a recent ESNUG post, John Cooley reviews the High-Level Synthesis Blue Book and takes the C synthesis contest. It takes less than 5 minutes to take the quiz. You also can test your HLS IQ. Will you best John Cooley’s score? Take the quiz: http://www.surveymonkey.com/s/VSKFYJ8 … Read More

Tags: High-Level Synthesis, Bluebook

Fast Forward ESL

Posted Dec 16, 2010, by Thomas Bollaert

Well, it has been quite a while since my last post on this blog. But I today I wanted to share some interesting data points from Gary Smith’s latest “ESL Market Overview” report which came out a few weeks ago. The first fact is that, in what Gary calls “one of the worst years in EDA history”, ESL outperformed the overall EDA market. While EDA declined by 6.6%, ESL “held its own with a negative 1.3% … Read More

Tags: Vista, High-Level Synthesis, Catapult C Synthesis

HLS Summer Readings

Posted Jul 27, 2010, by Thomas Bollaert

Late July… Summer is upon us in all its splendor… But the show goes on. In the past few days two interesting articles related to High-Level Synthesis (HLS) were published, in EETimes and EDN, respectively. Tips for implementing a viable ESL-synthesis flow In EDN, Nancy Wu – Chief Analyst at Gary Smith EDA – addresses engineers “about to make plunge” and discusses items to help them set … Read More

TSMC and Mentor collaborate on ESL for Reference Flow 11

Posted Jun 15, 2010, by Thomas Bollaert

When the world’s leading foundry invests time and resources to extend its reference flow with ESL methodologies, this has to be a sign that electronic-system level (ESL) practices have come of age. This announcement is not only the confirmation of the vital importance of ESL for the electronic design community, it is also a strong sign that flows have matured to the point where mainstream designers … Read More

Tags: Architecture Design, Catapult C Synthesis, ESL Verification, Vista, Architecture Validation

The HLS Bluebook: got your copy yet?

Posted Jun 13, 2010, by Thomas Bollaert

With every new technology comes a learning curve, and High-Level Synthesis isn’t different in this respect. Ramping up on a new tool obviously means learning its knobs and switches, but most importantly when it comes to synthesis, the ultimate key to successful results is to learn and understand the proper coding style. Let’s time warp back to 1994. Back then I was learning RTL synthesis and picking … Read More

Tags: DAC, Bluebook

47th DAC: To your lists... get set... go!

Posted Jun 11, 2010, by Thomas Bollaert

There it goes again… Every four years it’s the same struggle… How can one survive being both a soccer fan and an EDA professional when DAC and the FIFA world cup collide? In a few hours, France will play Uruguay. How can one soundly go through long final reviews when his home team is playing? Of course, attending the conference as a visitor or an exhibitor isn’t quite the same thing and the preparation … Read More

Tags: DAC, Catapult C Synthesis

Dropping RTL for C++, from Finland to India

Posted Jun 8, 2010, by Thomas Bollaert

Whether seen as a necessity to tackle design complexity or an opportunity to improve productivity, high-level synthesis has been one of hottest EDA topics in the past couple of years. In this blog, I have been trying to provide, amongst others, regular updates on customer case studies - for instance here, here or here. In the past couple of weeks, two new and really interesting contributions were added … Read More

Tags: DAC