Posted Jun 6, 2011, by Thomas Bollaert
One year ago, I was writing about the inclusion of Mentor ESL in the TSMC Reference Flow 11, and why the endorsement of system-level design and high-level synthesis by the world’s leading foundry was a telling sign of maturity for ESL.
Since this first major milestone, TSMC and Mentor haven’t remained idle, on the contrary. Both parties teamed-up to take this first ESL flow to a whole new … Read More
Tags:
Vista,
DAC,
esl,
Catapult C,
TSMC,
Verification,
High-Level Synthesis,
How-to
Posted Jun 6, 2011, by Thomas Bollaert
Last night, in his traditional DAC-opening presentation, Gary Smith addressed the crowd with a loud and clear message about the cost of doing hardware design. Design costs are steadily increasing and this is draining life and blood out of the industry. When chip design costs reach $25M, VCs stop funding start-ups. When costs reach $50M, continued Gary Smith, even IDMs struggle to afford ASIC developments.
So … Read More
Tags:
cost,
DAC,
ASIC,
High-Level Synthesis,
How-to,
esl,
Gary Smith
Posted May 16, 2011, by Thomas Bollaert
If you are going to DAC this year, then you must attend the 9th Annual ESL Symposium and not just because there is free lunch or you need the new Apple iPad 2. This year, Wally Rhines will moderate a very impressive panel line-up:
Gadi Singer - Intel
Vice President, Intel Architecture Group
General Manager, System-on-Chip Enabling Group
John Goodenough - ARM
Vice President of Design Technology and … Read More
Tags:
User Testimonial,
Freescale,
STMicroelectronics,
High-Level Synthesis,
esl,
DAC,
intel,
ARM
Posted Jun 13, 2010, by Thomas Bollaert
With every new technology comes a learning curve, and High-Level Synthesis isn’t different in this respect. Ramping up on a new tool obviously means learning its knobs and switches, but most importantly when it comes to synthesis, the ultimate key to successful results is to learn and understand the proper coding style.
Let’s time warp back to 1994. Back then I was learning RTL synthesis and picking … Read More
Tags:
DAC,
Bluebook
Posted Jun 11, 2010, by Thomas Bollaert
There it goes again… Every four years it’s the same struggle… How can one survive being both a soccer fan and an EDA professional when DAC and the FIFA world cup collide? In a few hours, France will play Uruguay. How can one soundly go through long final reviews when his home team is playing?
Of course, attending the conference as a visitor or an exhibitor isn’t quite the same thing and the preparation … Read More
Tags:
DAC,
Catapult C Synthesis
Posted Jun 8, 2010, by Thomas Bollaert
Whether seen as a necessity to tackle design complexity or an opportunity to improve productivity, high-level synthesis has been one of hottest EDA topics in the past couple of years. In this blog, I have been trying to provide, amongst others, regular updates on customer case studies - for instance here, here or here.
In the past couple of weeks, two new and really interesting contributions were added … Read More
Tags:
DAC
Posted May 6, 2010, by Thomas Bollaert
Many things jump to mind when I recall last year’s DAC in San Francisco. But I remember really well the scramble to find a seat in the auditorium packed with the 300 other attendees of the ESL Symposium.
For sure, this event should not be missed this year either. In Anaheim, and for the 8th year in a row, a panel of industry experts will discuss the driving forces in ESL and share their thoughts and … Read More
Tags:
User Testimonial,
DAC,
Architecture Validation,
Vista,
High-Level Synthesis,
Architecture Design
Posted Dec 16, 2009, by Thomas Bollaert
John Cooley’s much awaited DAC trip report is out. The report is a compilation of hundreds of engineers thoughts, findings and commentaries on what they saw at this year’s conference in San Francisco. In a section of his report dedicated to high-level synthesis, John Cooley awards Cataput C an early lead in this area:
In the so-called “high level synthesis” space (I put HLS in quotes because that’s … Read More
Tags:
DAC,
Catapult C Synthesis,
High-Level Synthesis
Posted Oct 2, 2009, by Thomas Bollaert
Every industry has its own share of oracles prophesizing future trends and “paradigm shifts”. EDA is no exception. Call them experts, analysts or marketing folks. They are frequently irritatingly stubborn, sometimes amusingly wrong, but over time, you’ll also often find them right. From shew stone to tombstone, a vision’s journey can be ephemeral. But others will blossom, flourish and ultimately succeed.
So … Read More
Tags:
DAC,
High-Level Synthesis,
Catapult C Synthesis,
User Testimonial
Posted Jul 30, 2009, by Thomas Bollaert
A couple of hours after Hitachi Telecom’s inspiring presentation on a 2 million gate enhanced Forward-Error Correcting (FEC) system design with Catapult C, Nitin Chawla of STMicroelectronics gave extensive details on his experience with C synthesis for complex signal processing applications.
Differentiating the high-level synthesis input languages
Chawla opened his talk by comparing the … Read More
Tags:
User Testimonial,
DAC