Posted May 16, 2011, by Thomas Bollaert
If you are going to DAC this year, then you must attend the 9th Annual ESL Symposium and not just because there is free lunch or you need the new Apple iPad 2. This year, Wally Rhines will moderate a very impressive panel line-up:
Gadi Singer - Intel
Vice President, Intel Architecture Group
General Manager, System-on-Chip Enabling Group
John Goodenough - ARM
Vice President of Design Technology and … Read More
Tags:
User Testimonial,
Freescale,
STMicroelectronics,
High-Level Synthesis,
esl,
DAC,
intel,
ARM
Posted Apr 5, 2011, by Thomas Bollaert
“In recent times, ESL design methodologies have been the talk of the semiconductor design community and have found increasing acceptance. Most of the recent publications have given information on design flow needs and an high level overview of the (C/C++/SystemC) based high level synthesis design process using a small block level design scenario. Although productivity benefits for ESL methodologies … Read More
Tags:
RTL,
OFDM,
STMicroelectronics,
C synthesis,
Catapult C,
ANSI C++,
User Testimonial,
FFT,
Full-Chip,
High-Level Synthesis,
Control-Logic Synthesis,
DesignCon
Posted Apr 1, 2011, by Thomas Bollaert
You may have already encountered the expression “Full-Chip High-Level Synthesis” on this blog. I typically define it as the ability to model, verify and synthesize complete IP subsystems starting from C++/SystemC. This obviously encompasses core processing functionality, but also control-logic, memories, hierarchy, complex interfaces and interconnects. In other words, being able to do the … Read More
Tags:
SystemC,
Full-Chip,
User Testimonial,
Catapult C,
control,
C++,
High-Level Synthesis,
Deepchip,
ESNUG,
Control-Logic Synthesis,
Cooley
Posted Mar 7, 2011, by Thomas Bollaert
Good news for the industry: the DATE (Design, Automation, and Test in Europe) conference is back to growth. And perhaps it is not a surprise given that this year the event is being held in Grenoble. With its great views on the snowy Alps, Grenoble is emerging has the major hub of the electronic and semiconductor industry in Europe.
3D ICs, Low-power, ESL… The rich conference program covers all hot … Read More
Tags:
C synthesis,
High-Level Synthesis,
Bluebook,
User Testimonial,
STMicroelectronics,
Tutorial
Posted Feb 18, 2011, by Thomas Bollaert
Oh my, what a busy ESL agenda! There is content for everyone, everywhere. Here is a list of no less than 7 compelling events. Virtual Prototyping, ESL Verification, High-Level Synthesis: make your choice. What’s on your agenda? Which events will you be attending?
SystemC Day 2011 - February 28th, San Jose, CA
High-Level Synthesis Walks the Talk: Synthesizing a Complete Graphics Processing Application - … Read More
Tags:
User Testimonial,
EDA Tech Forum,
High-Level Synthesis
Posted Jan 21, 2011, by Thomas Bollaert
In a recently published white paper, authors Bruno Thery, Serge Mazer, Adrian Beames and Yvan Desmartin of STMicroelectronics describe their seven steps approach to achieve higher productivity using High-Level Synthesis (HLS) and how this was key to help them deliver working silicon in time for the Las Vegas CES in January 2010.
The white paper provides a detailed, step by step, description of how … Read More
Tags:
User Testimonial,
High-Level Synthesis
Posted May 6, 2010, by Thomas Bollaert
Many things jump to mind when I recall last year’s DAC in San Francisco. But I remember really well the scramble to find a seat in the auditorium packed with the 300 other attendees of the ESL Symposium.
For sure, this event should not be missed this year either. In Anaheim, and for the 8th year in a row, a panel of industry experts will discuss the driving forces in ESL and share their thoughts and … Read More
Tags:
User Testimonial,
DAC,
Architecture Validation,
Vista,
High-Level Synthesis,
Architecture Design
Posted Oct 27, 2009, by Thomas Bollaert
Recent testimonials and success stories from engineers at STMicroelectronics, Texas Instruments or Fujitsu give a pretty good idea of what can be accomplished with C synthesis. If you are interested in gaining a deeper understanding of how C synthesis really works and what synthesizable C code looks like, I can only recommend this upcoming web seminar:
Mobile Chip Design Using High-Level Synthesis
Hardware … Read More
Tags:
User Testimonial,
High-Level Synthesis
Posted Oct 26, 2009, by Thomas Bollaert
In a recent presentation at the Mentor User2User conference in Dallas, TI’s Karl Renner gave a very detailed presentation on how he used Catapult C to design a set-top-box IP. With only two engineers working on a tight 6 months schedule, Catapult C proved a necessity to complete the project in time.
Karl Renner works as a systems engineer at Texas Instruments in Dallas and over the past 12 years he … Read More
Tags:
Catapult C Synthesis,
High-Level Synthesis,
ASIC,
User Testimonial
Posted Oct 20, 2009, by Thomas Bollaert
When it comes to C synthesis successes, the literature – this blog included – is not short of examples quantifying time savings, productivity gains or improved area, timing or power consumption. Today I’d like to propose a new measure of success: “snaps”.
If you slowly raise your right hand and snap you fingers, you get one snap. Repeat this once and you’ll get two snaps. Now accelerate to get two … Read More
Tags:
User Testimonial,
Catapult C Synthesis