High-Level Synthesis Report 2011

This High Level Synthesis (HLS) report is based on Mentor Graphics 3rd annual independent worldwide survey executed during January 2011.

A total of 1,133 engineers and engineering management responded. This report analyzes the survey results and identifies relevant emerging trends. Its scope spans HLS adoption, time savings of HLS versus manual RTL, most desired abstraction level, and ESL integration into ESL flows.

A key goal of the report is to define the critical elements semiconductor company management must consider as they evaluate HLS deployment. The topics covered are:

  • Survey Methodology and Demographics
  • High Level Synthesis - Current Adoption and 2011 Plans
  • HLS Time to Verified RTL versus Manual RTL Implementation
  • Length of Delays Due To Late Functional Changes and Bug Fixes
  • General Criteria Used for HLS Tool Selection
  • Preferred Level of HLS Abstraction for Design Implementation
  • HLS Integration into ESL Flows
  • Summary and Conclusions

High-Level Synthesis Report 2011

Download Report (PDF, 866k)

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