Saving verification time using TLM modeling
On-demand Web Seminar: Today’s electronic systems embed one or more processors (with software!), bus, cache as well as more and more algorithm mapped in hardware in order to cope with performance requirements.
ESL Simulation with Veloce Hardware Emulation
On-demand Web Seminar: This session presents an overview of the Veloce emulator and its integration with Vista.
SoC Multi-core Architectural Exploration Using Vista
On-demand Web Seminar: This presentation will look at a number of different architectural choices; exploring how the architecture can be quickly characterized, how decisions can be analyzed and understood.
Jim Kenney at DAC 2012
Technology Overview: Jim Kenney, the Director of Marketing for Emulation at Mentor Graphics, talks about emulation at DAC 2012.
9th ESL Symposium Panel Discussion at DAC 2011
Technology Overview: Executives from Intel, ARM, Freescale, ST and Mentor will examine the industry-wide move to ESL by highlighting the views and experiences of executives from leading semiconductor, IP and EDA companies.
Delivering 10X Design Improvements
Technology Overview: Time and time again, escalating complexity has threatened to derail the IC industry from the extraordinary 35% annual reduction in transistor pricing it has enjoyed the past 40+ years. Fortunately, in each...