6th ESL Symposium Panel Discussion at DAC 2008
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While electronic system level (ESL) methodology has been debated for the past 10 years, most large companies have already successfully applied a variety of ESL solutions into their core design processes. This panel of expert users from a cross-section of the electronics industry will explore the commonalities (as well as differences) from their own ESL experiences.
Duration: 01:49:04
Details
Overview
While electronic system level (ESL) methodology has been debated for the past 10 years, most large companies have already successfully applied a variety of ESL solutions into their core design processes. This panel of expert users from a cross-section of the electronics industry will explore the commonalities (as well as differences) from their own ESL experiences.
Panelists:
- Rambus: Rashinkar Prakash, Director of Engineering
- Qualcomm: Viraphol Chaiyakul, Senior Director of Engineering, QCT SoC Platform
- ST Microelectronics: Nitin Chawla, Senior Member of Technical Staff, CCDS(TR&D)
- STARC: Kaz Yoshinaga, STARC Researcher, Design Standard Group, Planning Department
- Thales: Bernard Candaele, Department Head, SoC, IC & EDA
Topics include:
- ESL design objectives and challenges
- Role and boundaries of ESL for verification & synthesis
- What has worked - or what has not worked
- Top deployment priorities and methods
- Common technologies, languages and standards
- Lessons learned from their experiences
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