Mobile Chip Design Using High-Level Synthesis
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Learn how high-level synthesis has been used in mobile devices based on real-world experiences.
Duration: 49:11
Tags: High-Level Synthesis
Products: Catapult C Synthesis
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Details
Overview
During this webinar, we will discuss how high-level synthesis (HLS) has been used successfully in mobile devices based on real-world experience. This will include best practices and the key technologies that make HLS a reality in mobile device design.
Hardware for mobile devices has some of the most intricate design constraints of any ASIC development flow. The hardware runs at relatively slow performance, but is constrained by tight area and power requirements. Design cycles are often less than a year, requiring tradeoffs to be made quickly without exploring all the possible solutions. Hidden away in most of the mobile devices manufactured this year you’ll find hardware built using high-level synthesis. Usually it is focused on the wireless modem, and sometimes in the custom hardware for video and audio processing.
What You Will Learn
- Mobile Chip Design: Trends & Challenges
- Overview of High-Level Synthesis
- 64 QAM Decoder Example
- Case Study: Telegent Systems
About the Presenter
Dan Gardner
Dan Gardner is a technical marketing engineer at Mentor Graphics on the high-level synthesis team working on Catapult C Synthesis. With 14 years in logic design between Mentor Graphics and Lattice Semiconductor, he is an experienced RTL hardware design engineer with both ASIC and FPGA experience who has made the transition to high-level synthesis. While now focused on wireless and video algorithms for consumer electronics, past experience with interface IP, embedded processors and military/aerospace designs round out his expertise.
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