Industry Articles
December 2011
Energy Vs. Power: Energy, Power Optimization Is A System-Level Challenge
November 2011
System Performance Analysis and Software Optimization Using a TLM Virtual Platform
February 2011
Seize the Opportunity to Lower Power at the ESL
January 2011
The DeepChip Top 10 EDA Trip Report and Survey Stories of 2010
December 2010
The war is over: C++ and SystemC coexist in a single flow
April 2010
EDA technologies to watch out for at DAC 2010
March 2010
February 2010
January 2010
December 2009
SystemC and Transaction-Level Modeling (TLM) by Clive Maxfield
ESL Tools Take Center Stage As Designers Move Up
September 2009
C synthesis gains momentum, says Mentor Graphics
August 2009
More Designers Using C Synthesis by End of 2009
July 2009
How to Future-proof a Hardware Designer
System-Level Design Provides Maximum Control Over Power
SCDsource’s ten hot technologies to see at DAC
Cooley Gadfly: My Cheesy Must See List at DAC
Cooley Gadfly: I Sense A Tremor In The Force
IC Design Tool Unifies C++ Methods for Algorithms and Logic, Electronic Products
ESL...is it What You Want or What You Need?
June 2009
May 2009
Cooley Deepchip: Mentor tells Synfora get CatC facts straight
April 2009
Is ESL Formal Verification an Oxymoron?
Cooley Deepchip: A second US-based C synthesis design reports in
March 2009
February 2009
ESL Languages: Which One Is Right For Your Needs?
January 2009
December 2008
Mentor Graphics Receives 2008 Corporate Award from IEEE Standards Association
High-Performance Video Hardware in "No Time"
November 2008
Konica Minolta Designs FPGAs Using Behavioral Synthesis
Cooley DeepChip: The first US-based C/C++ chip design I’ve seen
October 2008
Cooley DeepChip: George is Wrong; SystemC/C++ Tools Play Nicely With Each Other
The Promise of TLM 2.0 - Exploring New Horizons
September 2008
Requirements Management is Essential for Today's Complex Electronics Systems
August 2008
Electronic-system-level design: Is there fire beneath the smoke?
July 2008
How high-level modeling speeds low-power design
Modeling cost, availability ups ESL return on investment
Mentor outlines ESL design and verification strategy: SCD Source Interviews Glenn Perry
June 2008
Cutting-Edge Application Demands Engineering Agility
STMicroelectronics Announces Certified Design Flow to Accelerate Creation of Next-Generation Silicon
May 2008
Cooley DeepChip: Troublemaker’s Panel
FPGA Design Requires Low-power Techniques
January 2008
System-level Validation Increases Design Productivity and Saves Errors
September 2007
New design methodologies offer easier path to custom DSP hardware
May 2007
Sequence and Mentor Graphics Collaborate on ESL Power Exploration Flow
SPIRIT's the Medium for Success for New FPGA Design
March 2007
Use ESL Synthesis Techniques to Replace Dedicated DSPs with FPGAs
February 2007
Mentor, MathStar partner on FPOA design tools
December 2006
Good or No Good? An Insider Look At What Works For ESL
Focusing on Primary ESL Design Solutions
October 2006
How to use Arbitrary Bit-widths in C++/C-based Algorithm Designs
August 2006
Synthesis tool cuts C-based design effort in half
June 2006
C synthesis tool features larger capacity
May 2006
Survey Shines Light on the State of ESL Design
April 2006
Need to accelerate the creation of technology-independent DSP hardware?
February 2006
Electronic System Level Design Press Releases
- Mentor Graphics Accelerates SoC and Embedded System Delivery with a Native Embedded Software Environment for Pre- and Post-Silicon Development, Embedding QEMU, SystemC and Emulation (Apr 22, 2013)
- Mentor Graphics Vista ESL Platform Takes Center Stage in Mentor’s ESL Strategy with Expanded Functionality (Sep 7, 2011)
- Mentor Graphics Announces Common Embedded Software Development Platform for any Stage of Development from Virtual Prototypes to Hardware Emulation and Boards (Jun 6, 2011)
- Mentor Graphics Forges TLM Synthesis Link Between Hardware Implementation and Virtual Prototyping (May 31, 2011)
- Mentor Graphics Calibre InRoute, Catapult C and FloTHERM Products Selected for EDN Magazine’s Hot 100 (Dec 23, 2010)
- Mentor Graphics Details Toshiba's Expanded Deployment of Catapult C for Complex ASIC Designs (Sep 1, 2010)
- Mentor Graphics Extends TSMC Reference Flow 11 with Support for ESL and Integrated Design and Manufacturing Closure (Jun 14, 2010)
- Mentor Graphics Publishes High-level Synthesis Reference Book in Answer to Increasing Adoption of Technology (Jun 9, 2010)
- Mentor Graphics Catapult C Adds SystemC Synthesis and Expands Full-Chip Capabilities (Jan 25, 2010)
- Mentor Graphics Catapult C Synthesis Selected by Fujitsu QNET to Achieve Significant Reduction in Power Consumption (Oct 20, 2009)