A Scalable Approach for TLM Across SystemC and SystemVerilog
Using a Virtual Prototype: A Sample
These example and application note provide information and background for using a sample virtual prototype (VP) created using the Mentor Vista product. You can run software on this VP using the Sourcery...
Vista Virtual Prototyping
Vista Virtual Prototyping provides an early, abstract functional model of the hardware to software engineers even before the hardware design is implemented in RTL. It can run software on embedded processor...