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Vista Virtual Prototyping for SystemC / TLM 2.0 and QEMU

Integrate and Optimize Software with Early Hardware Models

With software development becoming the fastest growing component of NRE costs for both SoC and final product development, the challenges of developing, integrating, validating, and optimizing software in the context of hardware are dominating the embedded design process. Thus it has become a necessity to make a fast, accurate, and low-cost simulation model of the hardware available early to the embedded software team.

Vista™ Virtual Prototyping provides an early abstract SystemC / TLM 2.0 and QEMU functional model of the hardware to software engineers even before the hardware design is implemented in RTL. It can run software on embedded processor models at speeds on-par with actual hardware. Vista Virtual Prototyping is seamlessly integrated with Sourcery™ CodeBench Virtual Edition to provide additional capabilities and benefits, such as the visibility and control to debug complex software/hardware interactions and the ability to optimize the software to meet final product performance and power goals.

Key Challenges

  • Early availability of hardware model for software integration
  • Visibility for debugging complex software/hardware interactions
  • Sufficiently fast simulation model for OS and application software validation
  • Alignment of hardware design with software requirements
  • Meeting embedded device performance and power goals
  • Integration of hardware views into native software development environment

Features and Benefits

  • Industry standard SystemC / TLM 2.0 and QEMU virtual prototype executable
  • Validation of software against early hardware model
  • Visibility of key hardware registers and attributes during software debug
  • Fast software execution speed par with BSP and final product speeds

  • Support for large industry-standard TLM models and platforms
  • Advanced product performance and power analysis under software control
  • Intuitive software debug environment based on Sourcery™ CodeBench Virtual Edition
  • Advanced embedded software analysis capabilities based on Sourcery™ Analyzer

Download Datasheet
Vista Virtual Prototyping
(PDF, 730kb)


Using a Virtual Prototype: A Sample

Download:  These example and application note provide information and background for using a sample virtual prototype (VP) created using the Mentor Vista product. You can run software on this VP using the Sourcery... View Download

Vista Virtual Prototyping

White Paper: Vista Virtual Prototyping provides an early, abstract functional model of the hardware to software engineers even before the hardware design is implemented in RTL. It can run software on embedded processor... View White Paper

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Platform Creation

Platform Creation

A Vista virtual prototype is a stand-alone simulation executable derived from a transaction-level modeling (TLM) platform created in Vista. A TLM platform is composed of interconnected transaction-level models represented in SystemC structural code. TLM is an abstracted modeling approach where details of the communication among functional units of digital systems are separated from the unit’s implementation details.

Vista’s Block Diagram Editor allows users to link graphical symbols of the abstracted models to each other, thus defining the topology of the design. Using a bottom-up design approach, the graphical symbols can be instantiated in the design using a schematic editor, as an intuitive and easy-to-use alternative to coding in a conventional text editor. Upon each save operation, the Block Diagram Editor automatically generates the structural code of the TLM platform. Vista Virtual prototypes run on Linux and Windows workstations.

Simulation Control

Simulation Control

Because it is a stand-alone executable, the Vista virtual prototype can be invoked, at either the command line or from the Mentor Embedded Sourcery CodeBench IDE environment. The Sourcery CodeBench IDE environment is used by thousands of embedded software engineers. It allows users to easily change the underlying hardware model between Vista virtual prototypes to hardware prototypes to boards. In addition, the user gains the benefits of added visibility into the hardware, tightly integrated HW/SW debugging, and control of file system interactions.

The Vista virtual prototype can run the hardware in two modes. The functional mode supports integration, validation, and debugging of the software, while the performance mode allows analyzing and optimizing the software to achieve better performance and reduced power consumption. To enable these modes, the virtual prototype is modeled at two levels of timing detail: loosely timed (LT) and approximately timed (AT). In LT, the virtual prototype models timing at an abstraction level where the transactions represent a complete data transfer across a hardware bus, independent of how the transfer actually occurs and the time the transfer consumes. In functional mode, simulation speed is in the range of hundreds of MIPS, equal or close to real-time speed. In AT, the virtual prototype models timing at an abstraction level in which transactions represent the phases of data transfer in a specific bus protocol. This level of accuracy will cause the virtual prototype to simulate in performance mode at about two orders of magnitude slower than in functional mode. Vista Virtual Prototyping allows users to “switch” between functional and performance modes during run time.

Software Development

Software Development

Vista Virtual Prototyping enables software to be developed, integrated, and validated with the hardware by providing, in a virtual prototype, equivalent or better capabilities to those found in hardware prototypes and board support packages (BSP). Vista Virtual Prototyping consistently and deterministically runs the actual software that will be later run on the final product. It supports running UI, application stacks, middleware, firmware, and drivers on top of operating systems; such as Linux, Android, and Nucleus, as well as in bare-metal mode. It provides the facilities and the methodology for building Linux kernels and for booting the operating system in a matter of seconds.

Vista Virtual Prototyping can be linked with physical devices, such as terminals and displays on the host workstation, allowing software engineers to control the virtual prototype. It also allows using the host workstation’s USB and Ethernet connections to run the virtual model under realistic environment conditions. Using semi-hosting, Vista Virtual Prototyping allows designers to print messages to the screen, print the current simulation time, and set error message verbosity. It also provides visibility and profiling facilities non-intrusively, such that these do not affect the behavior of the prototype and have only a minor effect on its performance.

Hardware-Software Debugging

Hardware-Software Debugging

Vista Virtual Prototyping provides the most widely used software debug environment, Sourcery CodeBench, which combines the visibility and control of hardware objects with tight integration into the software IDE. It provides sufficient visibility to debug software and identify hardware bugs without requiring software engineers to use hardware-oriented tools and testbenches.

Vista Virtual Prototyping provides the software engineer with direct visibility and control to the hardware objects in the platform, including peripheral registers and local variables as declared by the TLM platform creator. The user can conduct tight HW/SW debug by setting breakpoints in the hardware that stop the hardware simulation once the breakpoint condition occurs and then stepping through the software instructions. The user can view the state of the hardware objects resulting from the execution of each software instruction.

Virtual Prototyping offers additional HW/SW debugging capabilities by allowing software engineers to manipulate files from the embedded OS prompt that is booted on the virtual prototype. This enables users to develop, build, and debug software packages on the host, then access them from the target OS console without the need to re-simulate and re-boot the OS on the virtual prototype. It also supports customizing CPU core tracing by providing pre-defined callbacks on significant events; for example when a core has entered a sleep mode.

Hardware-Software Analysis

Hardware-Software Analysis

Vista Virtual Prototyping supports analysis of different performance and power metrics of the virtual prototype. These metrics are affected by both the hardware attributes of the platform and the embedded software running on the platform cores and CPUs. Average latencies, throughput, and utilization views on any port, bus, or sub-system enable the user to optimize the software to improve device performance. Dynamic and static power views of the platform allow the user to estimate the power consumed and optimize the application software and the software controlling the hardware to reduce power, reduce heat, and extend battery life.

Vista Virtual Prototyping provides software analysis views combined with corresponding hardware views through the Mentor Embedded Sourcery Analyzer product. Sourcery Analyzer supports Linux, RTOS, or bare-metal modes. It integrates data from single and multi-core CPUs running on the Vista virtual prototype with hardware trace data, and it uses Analysis Agents: a library of popular and intuitive system analysis and visualization tools that address the most common analysis views desired by software engineers. These include analysis views of the CPU state, file system activity, function calls, process and thread state, and various statistics. These, combined with hardware attributes, such as hit and miss ratios and power, allow the user to analyze the impact of their software operation on the final product functionality, performance, and power. Sourcery Analyzer also allows the user to write custom agents to improve performance and debugging.

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