Technical Events
Design Area:Embedded Software
Embedded Development in Host Simulation Environments: Leave the Hardware Alone! Web Seminar
This web seminar provides a detailed look at accelerating the design cycle by utilizing host simulation technology to build, debug, and test complete embedded systems, including a touch screen graphical... View Event
Developing the Next Generation of Embedded GUIs Web Seminar
Getting the GUI right – and doing it on budget and on time – presents a major challenge to developers, because every change to your application code introduces more risk. Nucleus Graphics eliminates... View Event
Dynamic Memory Allocation & Fragmentation in C & C++ Web Seminar
The problems of dynamic memory allocation in real time systems will be outlined in detail and a deterministic approach detailed. View Event
Design Area:ESL
ESL Symposium at DAC: ESL Driving Forces: The Art of Architecture Design and Verification
The 7th Annual ESL Symposium at DAC is moderated this year by Walden C. Rhines, CEO Mentor Graphics, who will be joined by a panel of industry experts sharing their insight and knowledge. View Event
Design Area:FPGA
FPGA Design Assurance Workshop (with DO-254 Considerations)
This hands-on, one-day workshop will cover the basic principles of a structured FPGA design process that is geared towards delivering both efficiency and a high-quality end product. The session discusses... View Event
Design Area:Functional Verification
FPGA Design Assurance Workshop (with DO-254 Considerations)
This hands-on, one-day workshop will cover the basic principles of a structured FPGA design process that is geared towards delivering both efficiency and a high-quality end product. The session discusses... View Event
Equivalence Checking for FPGA Designs Seminar
Designing today's powerful products put stress on verification environments. ModelSim extensive integrated support of VHDL, Verilog and SystemC provide a rich opportunity for debug productivity. View Event
Static CDC Analysis Hands-on Workshop
This workshop will teach you how to run static CDC analysis: setup your environment, review clock groups, run CDC analysis and analyze CDC results. Attendees will get a hands-on opportunity to run Mentor's... View Event
Clock-Domain Crossing Verification for FPGAs Seminar
This seminar teaches attendees about the types of problems associated with clock-domain crossings, the things you can do to avoid these issues, and how to apply an automated verification solution to ensure... View Event
Debugging with ModelSim Seminar
Designing today's powerful products put stress on verification environments. ModelSim extensive integrated support of VHDL, Verilog and SystemC provide a rich opportunity for debug productivity. View Event
Introduction to Advanced Testbenches and OVM Web Seminar
Learn what a Verification Methodology is, Basic transation level commincation and Testbench Design and Creation with the OVM. View Event
Advanced Debug with Questa Web Seminar
Debug Verilog deltas, process debugging, tracing through source code, comparing results of waveform files, vcd stimulus. Whatever your debugging requirements, this comprehensive technical debug seminar... View Event
Adopting Assertion Based Verification Workshop
This workshop is designed to help design and verification engineers adopt ABV for VHDL or Verilog designs by using a hands-on approach to learning. View Event
Easily Inspect & Find Defects in Your Processor-Based Design and Testbench Web Seminar
If you are running processor-driven tests with hundreds of thousands of lines of test code in digital simulation on your processor-based design, you know how difficult and time-consuming it is to figure... View Event
Finding the toughest bugs with 0-In Formal Verification Web Seminar
As designs get more complex, verification cycles increase dramatically while quality hangs in the balance. As a result, many companies are looking for a better methodology to help them achieve improved... View Event
Understanding the Basics of OVM for Verification Web Seminar
As a verification engineer you have probably already heard of the Open Verification Methodology (OVM) and added "The OVM methodology book" to your reading list. Whether or not you have opened... View Event
Combining Formal Model Checking and Simulation for Verification Closure Web Seminar
Formal verification of design properties is a powerful verification technology. However just as simulation has its limits, property checking has its limits as well. This webinar discusses a methodology... View Event
Design Area:IC Design
Calibre Design-to-Silicon Platform Workshop
Learn how to leverage the superior performance and capacity of the Calibre design-to-silicon platform, a comprehensive suite of tools designed to address the complex handoff between design and manufacturing. View Event
DAC Lunch & Learn: Partnering for DFM Compliant IP Seminar
Smart phones. Netbooks, GPS. Digital TVs. Computer graphics cards. These are some of the key applications driving design and tape-out at 65nm and below. These applications are highly cost-driven, and... View Event
Mixed-Signal Design Capture and Simulation within Mentor's Custom-IC Flow Workshop
In this technical hands-on workshop, you will use Mentor's Custom-IC flow and its integrated schematic, extraction and simulation tools to take a design from system specifications to post-layout verification... View Event
Reducing Physical Verification Cycle Times with Debug Innovation
With the increased complexity in physical verification rules and the improvements in runtimes with Calibre, the debugging of physical verification results is becoming a bottleneck in the verification cycle.... View Event
Design Area:Mechanical Analysis
Electronics Cooling - Virtual Prototyping an Introduction to FloTHERM Web Seminar (German Language)
One hour webinar will discuss virtual prototyping and introduce you to FloTHERM, a powerful 3D computational fluid dynamics software that predicts airflow and heat transfer in and around electronic equipment. ... View Event
Design for Longevity in Your Power LED Products
Manufacturers need to make sure that their products offer the best combination of brightness and longevity. View Event
Design Area:PCB Systems Design
3D Viewing in PADS Web Seminar
See how you can view your design in 3D within PADS Layout, and import mechanical data such as enclosures to ensure there are no interferences between the PCB assembly and mechanical structures. View Event
Powerful, Integrated and Affordable PADS 9.0 Seminar
This seminar will show you how PADS 9.0 solutions can speed your designs from concept to manufacturing, quickly and efficiently – and all at an affordable price! View Event
Hyperlynx & Xilinx Hands-On Workshop
This free technology-focused workshop provides attendees with hands-on education and practical experience focused on Signal Integrity Analysis using HyperLynx 8.0 simulation of Xilinx's Multi-Gbit interconnect... View Event
Design Area:Silicon Test and Yield Analysis
Layout-Aware Diagnosis: Better Failure and Yield Analysis Web Seminar
Scan logic diagnosis is a powerful tool to help failure analysis engineers determine the root cause of a failing die. Yield engineers, on the other hand, are interested in statistical analysis of volumes... View Event
Low Pin Count Test with Embedded Compression Web Seminar
This event will describe several methodologies that enable designers to reduce the number of pins and top level routing required for the application of high quality test. The focus will be on manufacturing... View Event
Design Area:System Modeling
Sensor and Signal Conditioning Circuit Design using Modeling and Simulation Technology Web Seminar
The "Sensor and Signal Conditioning Circuit Design using Modeling and Simulation Technology" presentation explores techniques for developing models of various sensors, based on datasheet performance... View Event
Power System Integration with SystemVision Web Seminar
Attendees will be exposed to techniques in power-system design that enable engineers from multiple disciplines to communicate, simulate, and optimize designs for first-pass success using Mentor Graphics... View Event
DAC 2009
Visit the Mentor Graphics booth, number 3567, to learn more about our software and hardware design solutions focused on IC design, place & route, physical verification, functional verification, FPGA/PLD, silicon test and yield analysis, PCB design, embedded software and emerging technologies such as ESL design and verification, system modeling and thermal analysis; and our innovative solutions that solve demanding design challenges such as low power and manufacturing variability.