6th Annual ESL Symposium at DAC

Finding the Common Ground on Successful ESL Methodologies: View from "Real World" Users

The 6th annual ESL Symposium offers an engaging technical event with industry panel discussion moderated by Walden “Wally” Rhines, Chairman and Chief Executive Officer of Mentor Graphics. Panel participants include experts from Rambus, STARC, ST Microelectronics and others.

Register today - Limited Seating

When: Wednesday, June 11 | Noon until 2PM
    Where: 45th DAC, Anaheim Convention Center 

You are invited to join us for an engaging discussion that will prove to be eye-opening and of great value to anyone considering an ESL methodology.

Free lunch and door prize for attendees, register today to reserve your seat!

While Electronic system level (ESL) methodology has been debated for the past 10 years, most large companies have already successfully applied a variety of ESL solutions into their core design processes. This panel of expert users from a cross-section of the electronics industry will explore the commonalities (as well as differences) from their own ESL experiences.

Register Today - Limited Seating

Walden C. RhinesWalden C. Rhines
Walden C. Rhines, 61, is Chairman and Chief Executive Officer of Mentor Graphics, a leader in worldwide electronic design automation with revenue of $792 million in 2006.  During his tenure at Mentor Graphics, revenue has more than doubled, growth rate since 1999 has been number one among the “Big 3” EDA companies and Mentor has grown the industry’s number one market share solutions in physical verification, design concept-through-functional verification and printed circuit board design.  
Full biography

Panelists topics include:
ESL design objectives and challenges
Role and boundaries of ESL for verification & synthesis
What has worked - or what has not worked
Top deployment priorities and methods
Common technologies, languages and standards
Lessons learned from their experiences
Panelist names and titles:
Rambus: Rashinkar Prakash, Director of Engineering
Qualcomm: Viraphol Chaiyakul, Senior Director of Engineering, QCT SoC Platform
ST Microelectronics: Mr. Nitin Chawla, Senior Member of Technical Staff, CCDS(TR&D)
STARC: Kaz Yoshinaga, OKI Semiconductor, STARC Researcher, Design Standard Group, Planning Department
Thales: Bernard Candaele, Department Head, SoC, IC & EDA
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